Datasheet > 存储 > SRAM> IDT71V65603S133BQ

IDT71V65603S133BQ

更新时间： 2024-11-06 23:05:07

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
26页	497K
描述
256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs

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256K x 36, 512K x 18

3.3V Synchronous ZBT™ SRAMs

ZBT™Feature

IDT71V65603

IDT71V65803

3.3V I/O, Burst Counter

PipelinedOutputs

Features

AddressandcontrolsignalsareappliedtotheSRAMduringoneclock

cycle,andtwocycleslatertheassociateddatacycleoccurs,beitreadorwrite.

TheIDT71V65603/5803containdataI/O,addressandcontrolsignal

registers.Outputenableistheonlyasynchronoussignalandcanbeused

todisabletheoutputsatanygiventime.

◆

256K x 36, 512K x 18 memory configurations

◆

Supports high performance system speed - 150MHz

(3.8ns Clock-to-Data Access)

ZBT^TMFeature - No dead cycles between write and read cycles

◆

Internally synchronized output buffer enable eliminates the

AClockEnable(CEN)pinallowsoperationoftheIDT71V65603/5803to

besuspendedaslongasnecessary.Allsynchronousinputsareignoredwhen

(CEN)ishighandtheinternaldeviceregisterswillholdtheirpreviousvalues.

Therearethreechipenablepins(CE1,CE2,CE2)thatallowtheuser

todeselectthedevicewhendesired.Ifanyoneofthesethreearenotasserted

whenADV/LDislow,nonewmemoryoperationcanbeinitiated.However,

anypendingdatatransfers(readsorwrites)willbecompleted.Thedatabus

willtri-statetwocyclesafterchipisdeselectedorawriteisinitiated.

TheIDT71V65603/5803haveanon-chipburstcounter.Intheburst

mode,theIDT71V65603/5803canprovidefourcyclesofdataforasingle

address presented to the SRAM. The order of the burst sequence is

defined by the LBO input pin. The LBO pin selects between linear and

interleaved burst sequence. The ADV/LD signal is used to load a new

externaladdress(ADV/LD=LOW) orincrementtheinternalburstcounter

(ADV/LD = HIGH).

need to control OE

Single R/W (READ/WRITE) control pin

Positive clock-edge triggered address, data, and control

signal registers for fully pipelined applications

4-word burst capability (interleaved or linear)

Individual byte write (BW1 - BW4) control (May tie active)

Three chip enables for simple depth expansion

3.3V power supply (±5%)

3.3V I/O Supply (VDDQ)

Power down controlled by ZZ input

Packaged in a JEDEC standard 100-pin plastic thin quad

flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch

ball grid array(fBGA).

◆

Description

The IDT71V65603/5803 are 3.3V high-speed 9,437,184-bit

(9Megabit)synchronousSRAMS.Theyaredesignedtoeliminatedeadbus

cycleswhenturningthebusaroundbetweenreadsandwrites,orwritesand

The IDT71V65603/5803 SRAM utilize IDT's latest high-performance

CMOSprocess,andarepackagedinaJEDECStandard14mmx20mm100-

pinthinplasticquadflatpack(TQFP)aswellasa119ballgridarray(BGA)and

165 fine pitch ball grid array (fBGA) .

reads.Thus,theyhavebeengiventhenameZBT ,orZeroBusTurnaround.

PinDescriptionSummary

A -A

Address Inputs

Input

I/O

Synchronous

Asynchronous

Synchronous

N/A

Chip Enables

CE , CE , CE

Output Enable

R/W

CEN

Read/Write Signal

Clock Enable

Individual Byte Write Selects

Clock

BW , BW , BW , BW

CLK

ADV/LD

LBO

Advance burst address / Load new address

Linear / Interleaved Burst Order

Sleep Mode

Synchronous

Static

Asynchronous

Synchronous

Static

I/O -I/O , I/O -I/O

Data Input / Output

Core Power, I/O Power

Ground

DD DDQ

V , V

Supply

Static

5304 tbl 01

ZBT and Zero Bus Turnaround are trademarks of Integrated Device Technology, Inc. and the architecture is supported by Micron Technology and Motorola, Inc.

DECEMBER 2002

DSC-5304/05

12 3 4 5 6 7...26

中文翻译

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与IDT71V65603S133BQ相关器件

型号	品牌	获取价格	描述	数据表
IDT71V65603S133BQG	IDT	获取价格	ZBT SRAM, 256KX36, 4.2ns, CMOS, PBGA165, FBGA-165
IDT71V65603S133BQGI	IDT	获取价格	ZBT SRAM, 256KX36, 4.2ns, CMOS, PBGA165, FBGA-165
IDT71V65603S133BQI	IDT	获取价格	256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs
IDT71V65603S133PF	IDT	获取价格	256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs
IDT71V65603S133PFG	IDT	获取价格	ZBT SRAM, 256KX36, 4.2ns, CMOS, PQFP100, PLASTIC, MO-136, TQFP-100
IDT71V65603S133PFG8	IDT	获取价格	ZBT SRAM, 256KX36, 4.2ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100
IDT71V65603S133PFI	IDT	获取价格	256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs
IDT71V65603S150BG	IDT	获取价格	256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs
IDT71V65603S150BG8	IDT	获取价格	ZBT SRAM, 256KX36, 3.8ns, CMOS, PBGA119, BGA-119
IDT71V65603S150BGG	IDT	获取价格	ZBT SRAM, 256KX36, 3.8ns, CMOS, PBGA119, MS-028AA, BGA-119

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