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IDT71V016S12BF PDF预览

IDT71V016S12BF

更新时间: 2023-03-15 00:00:00
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
8页 105K
描述
Standard SRAM, 64KX16, 12ns, CMOS, PBGA48, 7 X 7 MM, FBGA-48

IDT71V016S12BF 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:LFBGA,针数:48
Reach Compliance Code:compliantECCN代码:3A991.B.2.B
HTS代码:8542.32.00.41风险等级:5.73
最长访问时间:12 nsJESD-30 代码:S-PBGA-B48
JESD-609代码:e0长度:7 mm
内存密度:1048576 bit内存集成电路类型:STANDARD SRAM
内存宽度:16湿度敏感等级:3
功能数量:1端子数量:48
字数:65536 words字数代码:64000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:64KX16
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装形状:SQUARE封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):225
认证状态:Not Qualified座面最大高度:1.34 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:BALL
端子节距:0.75 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:20宽度:7 mm
Base Number Matches:1

IDT71V016S12BF 数据手册

 浏览型号IDT71V016S12BF的Datasheet PDF文件第2页浏览型号IDT71V016S12BF的Datasheet PDF文件第3页浏览型号IDT71V016S12BF的Datasheet PDF文件第4页浏览型号IDT71V016S12BF的Datasheet PDF文件第5页浏览型号IDT71V016S12BF的Datasheet PDF文件第6页浏览型号IDT71V016S12BF的Datasheet PDF文件第7页 
PRELIMINARY  
IDT71V016  
3.3V CMOS STATIC RAM  
1 MEG (64K x 16-BIT)  
Integrated Device Technology, Inc.  
FEATURES:  
DESCRIPTION:  
• 64K x 16 advanced high-speed CMOS Static RAM  
• Commercial (0˚ to 70˚C) and Industrial (-40˚C to 85˚C)  
• Equal access and cycle times  
The IDT71V016 is a 1,048,576-bit high-speed Static RAM  
organized as 64K x 16. It is fabricated using IDT’s high-  
perfomance, high-reliability CMOS technology. This state-of-  
the-art technology, combined with innovative circuit design  
techniques, provides a cost-effective solution for high-speed  
memory needs.  
— Commercial and Industrial: 12/15/20ns  
• One Chip Select plus one Output Enable pin  
• Bidirectional data inputs and outputs directly  
TTL-compatible  
• Low power consumption via chip deselect  
• Upper and Lower Byte Enable Pins  
• Single 3.3V(±0.3V) power supply  
The IDT71V016 has an output enable pin which operates  
as fast as 7ns, with address access times as fast as 12ns. All  
bidirectional inputs and outputs of the IDT71V016 are TTL-  
compatible and operation is from a single 3.3V supply. Fully  
static asynchronous circuitry is used, requiring no clocks or  
refresh for operation.  
• Available in 44-pin Plastic SOJ and 44-pin TSOP  
package and 48-BALL Plastic FBGA  
The IDT71V016 is packaged in a JEDEC standard 44-pin  
Plastic SOJ and 44-pin TSOP Type II and 48-BALL 7 x 7 mm  
Plastic FBGA .  
FUNCTIONAL BLOCK DIAGRAM  
Output  
Enable  
Buffer  
OE  
Address  
Buffers  
Row / Column  
Decoders  
A0 - A15  
I/O 15  
High  
Byte  
I/O  
8
8
Chip  
Enable  
Buffer  
CS  
Buffer  
I/O 8  
Sense  
Amps  
and  
Write  
Drivers  
16  
64K x 16  
Memory  
Array  
Write  
Enable  
Buffer  
WE  
I/O 7  
I/O 0  
Low  
Byte  
I/O  
8
8
Buffer  
BHE  
BLE  
Byte  
Enable  
Buffers  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
3211 drw 01  
INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES  
JULY 1998  
©1998 Integrated Device Technology, Inc.  
DSC-3211/5  
1

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