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IDT71128 PDF预览

IDT71128

更新时间: 2024-11-15 22:57:19
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
8页 83K
描述
CMOS Static RAM 1 Meg (256K x 4-Bit) Revolutionary Pinout

IDT71128 数据手册

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CMOS Static RAM  
1 Meg (256K x 4-Bit)  
Revolutionary Pinout  
IDT71128  
Description  
Features  
The IDT71128 is a 1,048,576-bit high-speed static RAM  
organized as 256K x 4. It is fabricated using IDTs high-perfor-  
mance, high-reliability CMOS technology. This state-of-the-art  
technology, combined with innovative circuit design techniques,  
provides a cost-effective solution for high-speed memory needs.  
The JEDEC centerpower/GND pinout reduces noise generation  
and improves system performance.  
256K x 4 advanced high-speed CMOS static RAM  
JEDEC revolutionary pinout (center power/GND) for  
reduced noise.  
Equal access and cycle times  
— Commercial and Industrial: 12/15/20ns  
One Chip Select plus one Output Enable pin  
Bidirectional inputs and outputs directly  
The IDT71128 has an output enable pin which operates as fast  
as 6ns, with address access times as fast as 12ns available. All  
bidirectional inputs and outputs of the IDT71128 are TTL-compat-  
ible and operation is from a single 5V supply. Fully static asyn-  
chronous circuitry is used; no clocks or refreshes are required for  
operation.  
TTL-compatible  
Low power consumption via chip deselect  
Available in a 32-pin 400 mil Plastic SOJ.  
The IDT71128 is packaged in a 32-pin 400 mil Plastic SOJ.  
Functional Block Diagram  
A0  
1,048,576-BIT  
MEMORY  
ARRAY  
ADDRESS  
DECODER  
.
A17  
4
4
I/O0 - I/O3  
I/O CONTROL  
CS  
WE  
OE  
CONTROL  
LOGIC  
3483 drw 01  
FEBRUARY 2001  
DSC-3483/09  
1
©2000IntegratedDeviceTechnology,Inc.  

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