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IDT70V5388S133BCI PDF预览

IDT70V5388S133BCI

更新时间: 2024-10-27 22:08:27
品牌 Logo 应用领域
艾迪悌 - IDT 存储内存集成电路静态存储器时钟
页数 文件大小 规格书
29页 395K
描述
3.3V 64/32K X 18 SYNCHRONOUS FOURPORT STATIC RAM

IDT70V5388S133BCI 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:17 X 17 MM, 1 MM PITCH, BGA-256针数:256
Reach Compliance Code:not_compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.9
Is Samacsys:N最长访问时间:3.4 ns
其他特性:PIPELINED ARCHITECTURE最大时钟频率 (fCLK):133 MHz
I/O 类型:COMMONJESD-30 代码:S-PBGA-B256
JESD-609代码:e0长度:17 mm
内存密度:1179648 bit内存集成电路类型:FOUR-PORT SRAM
内存宽度:18湿度敏感等级:3
功能数量:1端口数量:4
端子数量:256字数:65536 words
字数代码:64000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:64KX18输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LBGA
封装等效代码:BGA256,16X16,40封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE并行/串行:PARALLEL
峰值回流温度(摄氏度):225电源:3.3 V
认证状态:Not Qualified座面最大高度:1.5 mm
最大待机电流:0.015 A最小待机电流:3.15 V
子类别:SRAMs最大压摆率:0.325 mA
最大供电电压 (Vsup):3.45 V最小供电电压 (Vsup):3.15 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn63Pb37)端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:20宽度:17 mm
Base Number Matches:1

IDT70V5388S133BCI 数据手册

 浏览型号IDT70V5388S133BCI的Datasheet PDF文件第2页浏览型号IDT70V5388S133BCI的Datasheet PDF文件第3页浏览型号IDT70V5388S133BCI的Datasheet PDF文件第4页浏览型号IDT70V5388S133BCI的Datasheet PDF文件第5页浏览型号IDT70V5388S133BCI的Datasheet PDF文件第6页浏览型号IDT70V5388S133BCI的Datasheet PDF文件第7页 
3.3V 64/32K X 18  
IDT70V5388/78  
SYNCHRONOUS  
FOURPORT™ STATIC RAM  
Features  
Counter wrap-around control  
– Internal mask register controls counter wrap-around  
– Counter-Interrupt flags to indicate wrap-around  
Counter readback on address lines  
Mask register readback on address lines  
Global Master reset for all ports  
Dual Chip Enables on all ports for easy depth expansion  
Separate upper-word and lower-word controls on all ports  
272-BGA package (27mm x 27mm 1.27mm ball pitch) and  
256-BGA package (17mm x 17mm 1.0mm ball pitch)  
Commercial and Industrial temperature ranges  
JTAG boundary scan  
True four-ported memory cells which allow simultaneous  
access of the same memory location  
Synchronous Pipelined device  
– 64/32K x 18 organization  
Pipelined output mode allows fast 200MHz operation  
High Bandwidth up to 14 Gbps (200MHz x 18 bits wide x  
4 ports)  
LVTTL I/O interface  
High-speed clock to data access 3.0ns (max.)  
3.3V Low operating power  
Interrupt flags for message passing  
Width and depth expansion capabilities  
MBIST (Memory Built-In Self Test) controller  
Port - 1 Logic Block Diagram(2)  
R/  
W
P1  
0
1
1/0  
UBP1  
CE0P1  
CE1P1  
LBP1  
OEP1  
I/O9P1 - I/O17P1  
I/O0P1 - I/O8P1  
Port 1  
I/O  
Control  
TRST  
TMS  
JTAG  
TCK  
TDI  
Controller  
MBIST  
TDO  
CLKMBIST  
Addr.  
Read  
Back  
Port 1  
Readback  
Register  
MRST  
(1)  
A
0P1 - A15P1  
Port 1  
Mask  
,
Register  
CNTRDP1  
MKRDP1  
MKLDP1  
Port 1  
Address  
Decode  
64KX18  
Memory  
Array  
Priority  
Decision  
Logic  
Port 1  
CNTINCP1  
CNTLDP1  
CNTRSTP1  
Counter/  
Address  
Register  
CLKP1  
R/  
WP1  
Port 1  
Interrupt  
Logic  
CE0P1  
CE1P1  
CLKP1  
MRST  
CNTINTP1  
INTP1  
MRST  
5649 drw 01  
NOTE:  
1. A15x is a NC for IDT70V5378.  
2. Port 2, Port 3, and Port 4 Logic Blocks are similar to Port 1 Logic Blocks.  
AUGUST 2003  
1
DSC-5649/3  
©2003IntegratedDeviceTechnology,Inc.  

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