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IDT7006S55FB PDF预览

IDT7006S55FB

更新时间: 2024-11-05 22:21:15
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
20页 262K
描述
HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM

IDT7006S55FB 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Transferred零件包装代码:QFP
包装说明:QFF, QFL68,.95SQ针数:68
Reach Compliance Code:not_compliantECCN代码:3A001.A.2.C
HTS代码:8542.32.00.41风险等级:5.29
最长访问时间:55 ns其他特性:INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWN
I/O 类型:COMMONJESD-30 代码:S-PQFP-F68
JESD-609代码:e0长度:24.0792 mm
内存密度:131072 bit内存集成电路类型:DUAL-PORT SRAM
内存宽度:8功能数量:1
端口数量:2端子数量:68
字数:16384 words字数代码:16000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:16KX8
输出特性:3-STATE可输出:YES
封装主体材料:PLASTIC/EPOXY封装代码:QFF
封装等效代码:QFL68,.95SQ封装形状:SQUARE
封装形式:FLATPACK并行/串行:PARALLEL
峰值回流温度(摄氏度):225电源:5 V
认证状态:Not Qualified筛选级别:MIL-PRF-38535
座面最大高度:3.683 mm最大待机电流:0.03 A
最小待机电流:4.5 V子类别:SRAMs
最大压摆率:0.3 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:FLAT端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:24.0792 mm

IDT7006S55FB 数据手册

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IDT7006S/L  
HIGH-SPEED  
16K x 8 DUAL-PORT  
STATIC RAM  
Integrated Device Technology, Inc.  
• On-chip port arbitration logic  
• Full on-chip hardware support of semaphore signaling  
between ports  
• Fully asynchronous operation from either port  
• Devices are capable of withstanding greater than 2001V  
electrostatic discharge  
• Battery backup operation—2V data retention  
• TTL-compatible, single 5V (±10%) power supply  
• Available in a 68-pin PGA, a 68-pin quad flatpack, a 68-  
pin PLCC, and a 64-pin TQFP  
FEATURES:  
• True Dual-Ported memory cells which allow simulta-  
neous access of the same memory location  
• High-speed access  
— Military: 20/25/35/55/70ns (max.)  
— Commercial: 15/17/20/25/35/55ns (max.)  
• Low-power operation  
— IDT7006S  
Active: 750mW (typ.)  
Standby: 5mW (typ.)  
— IDT7006L  
• Industrial temperature range (–40°C to +85°C) is avail-  
able, tested to military electrical specifications  
Active: 750mW (typ.)  
Standby: 1mW (typ.)  
DESCRIPTION:  
• IDT7006 easily expands data bus width to 16 bits or  
more using the Master/Slave select when cascading  
more than one device  
• M/S = H for BUSY output flag on Master,  
M/S = L for BUSY input on Slave  
• Busy and Interrupt Flags  
The IDT7006 is a high-speed 16K x 8 Dual-Port Static  
RAM. The IDT7006 is designed to be used as a stand-alone  
Dual-Port RAM or as a combination MASTER/SLAVE Dual-  
Port RAM for 16-bit-or-more word systems. Using the IDT  
MASTER/SLAVE Dual-Port RAM approach in 16-bit or wider  
FUNCTIONAL BLOCK DIAGRAM  
OEL  
OER  
CEL  
CER  
R/WR  
R/W  
L
I/O0L- I/O7L  
I/O0R-I/O7R  
(1,2)  
I/O  
Control  
I/O  
Control  
BUSY(1,2)  
L
BUSY  
R
A
13L  
A
13R  
0R  
Address  
Decoder  
MEMORY  
ARRAY  
Address  
Decoder  
A
0L  
A
14  
NOTES:  
14  
1. (MASTER):  
BUSY is  
ARBITRATION  
INTERRUPT  
SEMAPHORE  
LOGIC  
CE  
OE  
R/W  
L
CE  
OE  
R/W  
R
output;  
(SLAVE):  
BUSY is input.  
2. BUSY outputs  
and INT  
R
L
R
L
outputs are  
non-tri-stated  
push-pull.  
SEM  
L
SEM  
R
(2)  
INT (2)  
L
INTR  
M/S  
2739 drw 01  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
OCTOBER 1996  
©1996 Integrated Device Technology, Inc.  
DSC-2739/5  
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.  
6.07  
1

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