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IDT7006S35J8 PDF预览

IDT7006S35J8

更新时间: 2024-11-05 14:51:23
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
20页 241K
描述
Dual-Port SRAM, 16KX8, 35ns, CMOS, PQCC68, 0.950 X 0.950 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-68

IDT7006S35J8 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:LCC
包装说明:0.950 X 0.950 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-68针数:68
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.66
Is Samacsys:N最长访问时间:35 ns
其他特性:INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWNI/O 类型:COMMON
JESD-30 代码:S-PQCC-J68JESD-609代码:e0
长度:24.2062 mm内存密度:131072 bit
内存集成电路类型:DUAL-PORT SRAM内存宽度:8
湿度敏感等级:1功能数量:1
端口数量:2端子数量:68
字数:16384 words字数代码:16000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:16KX8
输出特性:3-STATE可输出:YES
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC68,1.0SQ封装形状:SQUARE
封装形式:CHIP CARRIER并行/串行:PARALLEL
峰值回流温度(摄氏度):225电源:5 V
认证状态:Not Qualified座面最大高度:4.572 mm
最大待机电流:0.015 A最小待机电流:4.5 V
子类别:SRAMs最大压摆率:0.25 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:24.2062 mm
Base Number Matches:1

IDT7006S35J8 数据手册

 浏览型号IDT7006S35J8的Datasheet PDF文件第2页浏览型号IDT7006S35J8的Datasheet PDF文件第3页浏览型号IDT7006S35J8的Datasheet PDF文件第4页浏览型号IDT7006S35J8的Datasheet PDF文件第5页浏览型号IDT7006S35J8的Datasheet PDF文件第6页浏览型号IDT7006S35J8的Datasheet PDF文件第7页 
HIGH-SPEED  
IDT7006S/L  
16K x 8 DUAL-PORT  
STATIC RAM  
one device  
Features  
M/S = H for BUSY output flag on Master,  
M/S = L for BUSY input on Slave  
Busy and Interrupt Flags  
On-chip port arbitration logic  
Full on-chip hardware support of semaphore signaling  
between ports  
Fully asynchronous operation from either port  
Devices are capable of withstanding greater than 2001V  
electrostatic discharge  
Battery backup operation—2V data retention  
TTL-compatible, single 5V (±10%) power supply  
Available in 68-pin PGA, quad flatpack, PLCC, and a 64-pin  
TQFP  
True Dual-Ported memory cells which allow simultaneous  
reads of the same memory location  
High-speed access  
– Military:20/25/35/55/70ns(max.)  
– Industrial: 55ns (max.)  
– Commercial:15/17/20/25/35/55ns(max.)  
Low-power operation  
– IDT7006S  
Active: 750mW (typ.)  
Standby: 5mW (typ.)  
– IDT7006L  
Active: 700mW (typ.)  
Standby: 1mW (typ.)  
IDT7006 easily expands data bus width to 16 bits or more  
using the Master/Slave select when cascading more than  
Industrial temperature range (–40°C to +85°C) is available  
for selected speeds  
FunctionalBlockDiagram  
OER  
OEL  
CER  
CEL  
R/WL  
R/WR  
I/O0L- I/O7L  
I/O0R-I/O7R  
I/O  
I/O  
Control  
Control  
(1,2)  
BUSYL  
(1,2)  
BUSYR  
A13L  
A13R  
Address  
Decoder  
MEMORY  
ARRAY  
Address  
Decoder  
A0L  
A0R  
14  
14  
ARBITRATION  
INTERRUPT  
SEMAPHORE  
LOGIC  
CEL  
OEL  
CER  
OER  
R/WR  
R/WL  
SEMR  
INTR  
SEML  
INTL  
M/S  
(2)  
(2)  
2739 drw 01  
NOTES:  
1. (MASTER): BUSY is output; (SLAVE): BUSY is input.  
2. BUSY outputs and INT outputs are non-tri-stated push-pull.  
SEPTEMBER 1999  
1
DSC-2739/11  

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