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IDT6116LA15Y PDF预览

IDT6116LA15Y

更新时间: 2024-11-11 22:57:15
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
10页 95K
描述
CMOS STATIC RAM 16K (2K x 8 BIT)

IDT6116LA15Y 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOJ包装说明:0.300 INCH, 1.27 MM PITCH, SOJ-24
针数:24Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.41
风险等级:5.68最长访问时间:15 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-J24
JESD-609代码:e0长度:15.88 mm
内存密度:16384 bit内存集成电路类型:STANDARD SRAM
内存宽度:8湿度敏感等级:3
功能数量:1端口数量:1
端子数量:24字数:2048 words
字数代码:2000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:2KX8输出特性:3-STATE
可输出:YES封装主体材料:PLASTIC/EPOXY
封装代码:SOJ封装等效代码:SOJ24,.34
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL电源:5 V
认证状态:Not Qualified座面最大高度:3.76 mm
最大待机电流:0.00002 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.14 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:J BEND
端子节距:1.27 mm端子位置:DUAL
宽度:7.62 mmBase Number Matches:1

IDT6116LA15Y 数据手册

 浏览型号IDT6116LA15Y的Datasheet PDF文件第2页浏览型号IDT6116LA15Y的Datasheet PDF文件第3页浏览型号IDT6116LA15Y的Datasheet PDF文件第4页浏览型号IDT6116LA15Y的Datasheet PDF文件第5页浏览型号IDT6116LA15Y的Datasheet PDF文件第6页浏览型号IDT6116LA15Y的Datasheet PDF文件第7页 
IDT6116SA  
IDT6116LA  
CMOS STATIC RAM  
16K (2K x 8 BIT)  
Integrated Device Technology, Inc.  
FEATURES:  
DESCRIPTION:  
• High-speed access and chip select times  
— Military: 20/25/35/45/55/70/90/120/150ns (max.)  
— Commercial: 15/20/25/35/45ns (max.)  
• Low-power consumption  
The IDT6116SA/LA is a 16,384-bit high-speed static RAM  
organized as 2K x 8. It is fabricated using IDT's high-perfor-  
mance, high-reliability CMOS technology.  
Access times as fast as 15ns are available. The circuit also  
offers a reduced power standby mode. When CSgoes HIGH,  
the circuit will automatically go to, and remain in, a standby  
power mode, as long as CS remains HIGH. This capability  
provides significant system level power and cooling savings.  
The low-power (LA) version also offers a battery backup data  
retention capability where the circuit typically consumes only  
1µW to 4µW operating off a 2V battery.  
All inputs and outputs of the IDT6116SA/LA are TTL-  
compatible. Fullystaticasynchronouscircuitryisused, requir-  
ing no clocks or refreshing for operation.  
The IDT6116SA/LA is packaged in 24-pin 600 and 300 mil  
plasticorceramicDIP anda24-leadgull-wingSOIC, anda24  
-lead J-bend SOJ providing high board-level packing densi-  
ties.  
• Battery backup operation  
— 2V data retention voltage (LA version only)  
• Produced with advanced CMOS high-performance  
technology  
• CMOS process virtually eliminates alpha particle  
soft-error rates  
• Input and output directly TTL-compatible  
• Static operation: no clocks or refresh required  
• Available in ceramic and plastic 24-pin DIP, 24-pin Thin  
Dip and 24-pin SOIC and 24-pin SOJ  
• Military product compliant to MIL-STD-833, Class B  
Militarygradeproductismanufacturedincompliancetothe  
latest version of MIL-STD-883, Class B, making it ideally  
suited to military temperature applications demanding the  
highest level of performance and reliability.  
FUNCTIONAL BLOCK DIAGRAM  
A 0  
VCC  
128 X 128  
ADDRESS  
DECODER  
MEMORY  
GND  
ARRAY  
A 10  
I/O 0  
I/O CONTROL  
INPUT  
DATA  
CIRCUIT  
I/O7  
CS  
OE  
WE  
CONTROL  
CIRCUIT  
3089 drw 01  
The IDT logo is aregistered trademark of Integrated Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
MARCH 1996  
1996 Integrated Device Technology, Inc.  
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.  
5.1  
3089/1  
1

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