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IDT5V995 PDF预览

IDT5V995

更新时间: 2024-11-11 22:55:27
品牌 Logo 应用领域
艾迪悌 - IDT 时钟驱动器
页数 文件大小 规格书
10页 75K
描述
3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK

IDT5V995 数据手册

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3.3V PROGRAMMABLE  
IDT5V995  
SKEW PLL CLOCK DRIVER  
TURBOCLOCK™ II  
FEATURES:  
DESCRIPTION:  
• Ref input is 5V tolerant  
TheIDT5V995isahighfanout3.3VPLLbasedclockdriverintendedfor  
highperformancecomputinganddata-communicationsapplications.Akey  
featureoftheprogrammableskewistheabilityofoutputstoleadorlagthe  
REFinputsignal. TheIDT5V995haseightprogrammableskewoutputsin  
fourbanksof2.Skewiscontrolledby3-levelinputsignalsthatmaybehard-  
wired to appropriate HIGH-MID-LOW levels.  
• 4 pairs of programmable skew outputs  
• Low skew: 185ps same pair, 250ps all outputs  
• Selectable positive or negative edge synchronization:  
Excellent for DSP applications  
• Synchronous output enable  
• Input frequency: 2MHz to 200MHz  
• Output frequency: 6MHz to 200MHz  
• 3-level inputs for skew and PLL range control  
• 3-level inputs for feedback divide selection multiply / divide  
ratios of (1-6, 8, 10, 12) / (2, 4)  
• PLL bypass for DC testing  
• External feedback, internal loop filter  
• 12mA balanced drive outputs  
Thefeedbackinputallowsdivide-by-functionalityfrom1to12throughthe  
use of the DS[1:0] inputs. This provides the user with frequency  
multiplication from 1 to 12 without using divided outputs for feedback.  
WhenthesOEpinisheldlow,alltheoutputsaresynchronouslyenabled.  
However, if sOE is held high, all the outputs except 2Q0 and 2Q1 are  
synchronouslydisabled. TheLOCKoutputassertstoindicatewhenPhase  
Lock has been achieved.  
Furthermore,whenPEisheldhigh,alltheoutputsaresynchronizedwith  
thepositiveedgeoftheREFclockinput.WhenPEisheldlow,alltheoutputs  
are synchronized with the negative edge of REF. The IDT5V995 has  
LVTTL outputs with 12mA balanced drive outputs.  
• Low Jitter: <100ps cycle-to-cycle  
• Power-down mode  
• Lock indicator  
• Available in TQFP package  
FUNCTIONALBLOCKDIAGRAM  
PE  
TEST  
FS  
LOCK  
PD  
sOE  
3
3
REF  
PLL  
/ N  
FB  
3
3
DS1:0  
3
3
1Q0  
1Q1  
Skew  
Select  
1F1:0  
2F1:0  
3F1:0  
4F1:0  
3
3
2Q0  
2Q1  
Skew  
Select  
3
3
3Q0  
3Q1  
Skew  
Select  
3
3
4Q0  
4Q1  
Skew  
Select  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
FEBRUARY 2002  
1
c
2002 Integrated Device Technology, Inc.  
DSC 5851/6  

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