Datasheet > ICS8752BYT

ICS8752BYT

更新时间： 2024-09-30 19:42:59

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
9页	105K
描述
Low Skew Clock Driver, 8 True Output(s), 0 Inverted Output(s), CMOS, PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, MS-026, LQFP-32

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技术参数
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ICS8752BYT 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LQFP,	针数：	32
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.92	Base Number Matches：	1

ICS8752BYT 数据手册

PRELIMINARY

ICS8752

Integrated

Circuit

Systems, Incꢀ

LOW SKEW 1-TO-8

LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER

GENERAL DESCRIPTION

FEATURES

The ICS8752 is a low voltage, low skew clock

• Fully integrated PLL

,&6

generator and a member of the HiPerClockS™

• 8 LVCMOS outputs, 7Ω typical output impedance

• External feedback for ”zero delay” clock regeneration

• Output frequency up to 240MHz

HiPerClockS™

family of High Performance Clock Solutions

from ICS. With output frequencies up to 240MHz

the ICS8752 is targeted for high performance

clock applications. Along with a fully integrated PLL the

ICS8752 contains frequency configurable outputs and an

external feedback input for regenerating clocks with “zero de-

lay”.

• VCO range 220MHz to 480MHz

• Dual LVCMOS clock inputs for redundant clock applications

• LVCMOS control inputs

Dual clock inputs, REF_CLK1 and REF_CLK2, support

redundant clock applications. The CLK_SEL input determines

which reference clock is used. The output divider values of

Bank A and B are controlled by the DIV_SELA0:1, and

DIV_SELB0:1, respectively.

• Bank skew, tsk(b), 100ps

• Output skew, tsk(o), 150ps

• Multiple-frequency skew, tsk(w), 200ps

• Cycle-to-cycle jitter, tjit(cc), 100ps, typical

• PLL reference zero delay, t(Ø), ±150ps, typical

• Full 3.3V

For test and system debug purposes the PLL_SEL input

allows the PLL to be bypassed. When HIGH the MR/nOE

input resets the internal dividers and forces the outputs to

the high impedance state.

The low impedance LVCMOS outputs of the ICS8752 are

designed to drive terminated transmission lines. The effec-

tive fanout of each output can be doubled by utilizing the

ability of each output to drive two series terminated trans-

mission lines.

• 32 lead low-profile QFP (LQFP)

• 7mm x 7mm x 1.4mm package body, 0.8mm lead pitch

• 0°C to 70°C ambient operating temperature

• Functionally compatible with the MPC952 in some applications

BLOCK DIAGRAM

PIN ASSIGNMENT

PLL_SEL

PLL

FB_IN

PHASE

÷2

÷4

VCO

32 31 30 29 28 27 26 25

DETECTOR

REF_CLK1

REF_CLK2

CLK_SEL

QA0

QA1

QA2

QA3

÷6

DIV_SELB0

DIV_SELB1

DIV_SELA0

DIV_SELA1

MR/nOE

GND

QB1

÷8

÷12

QB0

DIV_SELA1

DIV_SELA0

VDDO

QA3

ICS8752

REF_CLK1

GND

QB0

QB1

QB2

QB3

QA2

FB_IN

GND

DIV_SELB1

DIV_SELB0

10 11 12 13 14 15 16

32-Lead LQFP

Y package

Top View

MR/nOE

The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial

product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.

8752

www.icst.com/products/hiperclocks.html

REV. B MAY 4, 2001

12 3 4 5 6 7...9

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与ICS8752BYT相关器件

型号	品牌	获取价格	描述	数据表
ICS8752CY	ICSI	获取价格	LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER
ICS8752CYI	IDT	获取价格	PLL Based Clock Driver, 8752 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PQFP32,
ICS8752CYILFT	IDT	获取价格	暂无描述
ICS8752CYIT	IDT	获取价格	PLL Based Clock Driver, 8752 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PQFP32,
ICS8752CYLF	IDT	获取价格	PLL Based Clock Driver, 8752 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PQFP32,
ICS8752CYLFT	IDT	获取价格	PLL Based Clock Driver, 8752 Series, 8 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7
ICS8752CYT	ICSI	获取价格	LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER
ICS8752I	IDT	获取价格	LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER
ICS8752YLF	IDT	获取价格	Low Skew Clock Driver, 8 True Output(s), 0 Inverted Output(s), CMOS, PQFP32, 7 X 7 MM, 1.4
ICS87604AGI	IDT	获取价格	Processor Specific Clock Generator, 166.67MHz, PDSO28, 6.10 X 9.70 MM, 0.92 MM HEIGHT, MO-

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