ICS8741004AGLFT

更新时间： 2024-09-29 13:08:35

品牌	Logo	应用领域
艾迪悌 - IDT		衰减器 PC
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ICS8741004AGLFT 数据手册

DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL

PCI EXPRESS™ JITTER ATTENUATOR

ICS8741004

General Description

Features

The ICS8741004 is a high performance

Differential-to-LVDS/0.7V Differential Jitter

Attenuator designed for use in PCI Express™

systems. In some PCI Express systems, such as

those found in desktop PCs, the PCI Express clocks

• Two LVDS and two 0.7V differential output pairs

Bank B has two 0.7V differential output pairs

Bank A has two LVDS output pairs and

HiPerClockS™

• One differential clock input pair

• CLK, CLK pair can accept the following differential

are generated from a low bandwidth, high phase noise PLL

frequency synthesizer. In these systems, a jitter attenuator may be

required to attenuate high frequency random and deterministic

jitter components from the PLL synthesizer and from the system

board. The ICS8741004 has 3 PLL bandwidth modes: 200kHz,

600kHz and 2MHz. The 200kHz mode will provide maximum jitter

attenuation, but with higher PLL tracking skew and spread

spectrum modulation from the motherboard synthesizer may be

attenuated. The 600kHz provides an intermediate bandwidth that

can easily track triangular spread profiles, while providing good

jitter attenuation. The 2MHz bandwidth provides the best tracking

skew and will pass most spread profiles, but the jitter attenuation

will not be as good as the lower bandwidth modes. Because some

2.5Gb serdes have x20 multipliers while others have x25

multipliers, the ICS8741004 can be set for 1:1 mode or 5/4

multiplication mode (i.e. 100MHz input/125MHz output) using the

F_SEL pins.

input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL

• Output frequency range: 98MHz - 160MHz

• Input frequency range: 98MHz - 128MHz

• VCO range: 490MHz - 640MHz

• Cycle-to-cycle jitter: 35ps (maximum)

• Full 3.3V operating supply

• Three bandwidth modes allow the system designer to make

jitter attenuation/tracking skew design trade-offs

• 0°C to 70°C ambient operating temperature

• Available in both standard (RoHS 5) and lead-free (RoHS 6)

packages

The ICS8741004 uses IDT’s 3^rdGeneration FemtoClock™

PLL technology to achieve the lowest possible phase noise.

The device is packaged in a 24 Lead TSSOP package, making it

ideal for use in space constrained applications such as PCI

Express add-in cards.

Pin Assignment

QB1

V_DDO

QB0

QA1

V_DDO

QA0

PLL Bandwidth

QB0

IREF

F_SELB

QA0

BW_SEL

0 = PLL Bandwidth: ~200kHz

Float = PLL Bandwidth: ~600kHz (default)

1 = PLL Bandwidth: ~2MHz

OEB

V_DDA

GND

CLK

F_SELA

V_DD

OEA

ICS8741004

24-Lead TSSOP

4.4mm x 7.8mm x 0.925mm

package body

G Package

Top View

IDT™ / ICS™ PCI EXPRESS™ JITTER ATTENUATOR

ICS8741004AG REV. AAUGUST 3, 2007

12 3 4 5 6 7...17

中文翻译

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ICS8741004AGLFT 替代型号

型号	品牌	替代类型	描述	数据表
ICS8741004AGIT	IDT	功能相似	PLL Based Clock Driver, 8741004 Series, 4 True Output(s), 0 Inverted Output(s), PDSO24, 4.
ICS8741004AGI	IDT	功能相似	PLL Based Clock Driver, 8741004 Series, 4 True Output(s), 0 Inverted Output(s), PDSO24, 4.
ICS8741004AGLF	IDT	功能相似	DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EX

与ICS8741004AGLFT相关器件

型号	品牌	获取价格	描述	数据表
ICS8741004AGT	IDT	获取价格	PLL Based Clock Driver, 8741004 Series, 4 True Output(s), 0 Inverted Output(s), PDSO24, 4
ICS8741004BGI	IDT	获取价格	DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EX
ICS8741004BGILF	IDT	获取价格	PLL Based Clock Driver, 8741004 Series, 4 True Output(s), 0 Inverted Output(s), PDSO24, 4.
ICS8741004BGIT	IDT	获取价格	PLL Based Clock Driver, 8741004 Series, 4 True Output(s), 0 Inverted Output(s), PDSO24, 4.
ICS8741004BIL	IDT	获取价格	DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EX
ICS8741004I	IDT	获取价格	DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EX
ICS87421AMI	IDT	获取价格	±1/±2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR
ICS87421AMIFT	IDT	获取价格	±1/±2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR
ICS87421AMILF	IDT	获取价格	±1/±2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR
ICS87421AMILFT	IDT	获取价格	Low Skew Clock Driver, 87421 Series, 1 True Output(s), 0 Inverted Output(s), PDSO8, ROHS C

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