Datasheet > ICS8741004AGIT

ICS8741004AGIT

更新时间： 2024-09-29 19:47:23

品牌	Logo	应用领域
艾迪悌 - IDT		驱动光电二极管逻辑集成电路
页数	文件大小	规格书
12页	333K
描述
PLL Based Clock Driver, 8741004 Series, 4 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24

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ICS8741004AGIT 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	TSSOP
包装说明：	4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24	针数：	24
Reach Compliance Code：	not_compliant	HTS代码：	8542.39.00.01
风险等级：	5.91	系列：	8741004
输入调节：	DIFFERENTIAL	JESD-30 代码：	R-PDSO-G24
长度：	7.8 mm	逻辑集成电路类型：	PLL BASED CLOCK DRIVER
功能数量：	1	反相输出次数：
端子数量：	24	实输出次数：	4
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	认证状态：	Not Qualified
座面最大高度：	1.2 mm	最大供电电压 (Vsup)：	3.465 V
最小供电电压 (Vsup)：	3.135 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	宽度：	4.4 mm
最小 fmax：	98 MHz	Base Number Matches：	1

ICS8741004AGIT 数据手册

PRELIMINARY

ICS8741004I

PCI EXPRESS™

JITTER ATTENUATOR

Integrated

Circuit

Systems, Inc.

GENERAL DESCRIPTION

FEATURES

The ICS8741004I is a high performance • Two differential LVDS and two HCSL output pairs

ICS

HiPerClockS™

Differential-to-LVDS/HCSL Jitter Attenuator

• One differential clock input

designed for use in PCI Express™ systems. In

some PCI Express systems, such as those found

in desktop PCs, the PCI Express clocks are

• CLK and nCLK supports the following input types:

LVPECL, LVDS, LVHSTL, SSTL, HCSL

generated from a low bandwidth, high phase noise PLL

frequency synthesizer. In these systems, a jitter attenuator

may be required to attenuate high frequency random and

deterministic jitter components from the PLL synthesizer

and from the system board. The ICS8741004I has 3 PLL

bandwidth modes: 200kHz, 400kHz, and 800kHz. The

200kHz mode will provide maximum jitter attenuation, but

with higher PLL tracking skew and spread spectrum

modulation from the motherboard synthesizer may be

attenuated. 400kHz provides an intermediate bandwidth

that can easily track triangular spread profiles, while provid-

ing good jitter attenuation. 800kHz bandwidth provides the

best tracking skew and will pass most spread profiles, but

the jitter attenuation will not be as good as the lower band-

width modes. Because some 2.5Gb serdes have x20

multipliers while others have x25 multipliers, the 8741004I

can be set for 1:1 mode or 5/4 multiplication mode

(i.e. 100MHz input/125MHz output) using the FSEL pins.

• Output frequency range: 98MHz - 160MHz

• Input frequency range: 98MHz - 128MHz

• VCO range: 490MHz - 640MHz

• Cycle-to-cycle jitter: 15ps (typical)

• 3.3V operating supply

• Three bandwidth modes allow the system designer to

make jitter attenuation/tracking skew design trade-offs

• -40°C to 85°C ambient operating temperature

• Available in both standard and lead-free RoHS-compliant

packages

PLL BANDWIDTH

The ICS8741004I uses ICS 3^rdGeneration FemtoClock^TM

PLL technology to achive the lowest possible phase noise.

The device is packaged in a 24 Lead TSSOP package,

making it ideal for use in space constrained applications such

as PCI Express add-in cards.

BW_SEL

0 = PLL Bandwidth: ~200kHz

Float = PLL Bandwidth: ~400kHz (Default)

1 = PLL Bandwidth: ~800kHz

BLOCK DIAGRAM

PIN ASSIGNMENT

OEA

nQB1

QB1

V^DDO

QB0

nQA1

QA1

V^DDO

F_SELA

QA0

Float

QA0

BW_SEL

0 = ~200kHz

F_SELA

nQA0

BW_SEL

nQB0

IREF

F_SELB

OEB

÷5 (default)

÷4

nQA0

QA1

Float = ~400kHz

1 = ~800kHz

CLK

V^DDA

Phase

VCO

GND

nQA1

QB0

490 - 640 MHz

nCLK

Detector

F_SELA

V^DD

GND

nCLK

OEA

CLK

F_SELB

÷5 (default)

÷4

nQB0

QB1

ICS8741004I

24-LeadTSSOP

M = ÷5 (fixed)

4.40mm x 7.8mm x 0.92mm

package body

nQB1

F_SELB

G Package

TopView

IREF

OEB

Current Set

The Preliminary Information presented herein represents a product in prototyping or pre-production.The noted characteristics are based on initial

product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.

8741004AGI

www.icst.com/products/hiperclocks.html

REV.A MAY 31, 2006

12 3 4 5 6 7...12

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与ICS8741004AGIT相关器件

型号	品牌	获取价格	描述	数据表
ICS8741004AGLF	IDT	获取价格	DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EX
ICS8741004AGLFT	IDT	获取价格	暂无描述
ICS8741004AGT	IDT	获取价格	PLL Based Clock Driver, 8741004 Series, 4 True Output(s), 0 Inverted Output(s), PDSO24, 4
ICS8741004BGI	IDT	获取价格	DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EX
ICS8741004BGILF	IDT	获取价格	PLL Based Clock Driver, 8741004 Series, 4 True Output(s), 0 Inverted Output(s), PDSO24, 4.
ICS8741004BGIT	IDT	获取价格	PLL Based Clock Driver, 8741004 Series, 4 True Output(s), 0 Inverted Output(s), PDSO24, 4.
ICS8741004BIL	IDT	获取价格	DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EX
ICS8741004I	IDT	获取价格	DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EX
ICS87421AMI	IDT	获取价格	±1/±2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR
ICS87421AMIFT	IDT	获取价格	±1/±2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR

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