Datasheet > ICS8743008I

ICS8743008I

更新时间： 2024-09-30 11:14:47

品牌	Logo	应用领域
艾迪悌 - IDT		时钟发生器 PC 以太网以太网：16GBASE-T
页数	文件大小	规格书
28页	1233K
描述
FEMTOCLOCKS? LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR FOR PCI EXPRESS? AND ETHERNET

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ICS8743008I 数据手册

PRELIMINARY

FEMTOCLOCKS™ LVDS/LVPECL ZERO DELAY BUFFER/

CLOCK GENERATOR FOR PCI EXPRESS™ AND ETHERNET

ICS8743008I

General Description

Features

The ICS8743008I is Zero-Delay Buffer/Frequency

• Eight differential output pairs with selectable pin type: LVDS or

LVPECL. Each output pair is individually selectable for 100MHz

or 125MHz (for PCIe and Ethernet applications).

Multiplier with eight differential LVDS or LVPECL

output pairs (pin selectable output type), and uses

external feedback for “zero delay” clock

HiPerClockS™

• One differential clock input pair CLK/nCLK can accept the

following differential input levels: LVPECL, LVDS, M-LVDS,

LVHSTL, HCSL

regeneration. In PCI Express and Ethernet

applications, 100MHz and 125MHz are the most commonly used

reference clock frequencies and each of the eight output pairs can

be independently set for either 100MHz or 125MHz. With an

output frequency range of 98MHz to 165MHz, the device is also

suitable for use in a variety of other applications such as Fibre

Channel (106.25MHz) and XAUI (156.25MHz). The M-LVDS

Input/Output pair is useful in backplane applications when the

reference clock can either be local (on the same board as the

ICS8743008I) or remote via a backplane connector. In output

mode, an input from a local reference clock applied to the

CLK/nCLK input pins is translated to M-LVDS and driven out to the

MLVDS/nMLVDS pins. In input mode, the internal M_LVDS driver

is placed in Hi-Z state using the OE_MLVDS pin and

• One M-LVDS I/O (MLVDS/nMLVDS)

• Output frequency range: 98MHz - 165MHz

• Input frequency range: 19.6MHz - 165MHz

• VCO range: 490MHz - 660MHz

• PCI Express (2.5 Gb/S) and Gen 2 (5 Gb/s) jitter compliant

• External feedback for “zero delay” clock regeneration

• RMS phase jitter @ 125MHz (1.875MHz – 20MHz):

0.57ps (typical)

• Full 3.3V supply mode

• -40°C to 85°C ambient operating temperature

• Available in lead-free (RoHS 6) packages

MLVDS/nMLVDS pin then becomes an input (e.g. from a

backplane).

The ICS8743008I uses very low phase noise FemtoClock

technology, thus making it ideal for such applications as PCI

Express Generation 1 and 2 as well as for Gigabit Ethernet, Fibre

Channel, and 10 Gigabit Ethernet. It is packaged in a 56-VFQFN

package (8mm x 8mm).

Pin Assignment

56 55 54 53 52 51 50 49 48 47 46 45 44 43

V_DD

V_DDO

OE_MLVDS

nQ2

MLVDS

nMLVDS

GND

nQ3

V_DDO

PLL_SEL

V_DD

nQ4

nQ5

FBO_DIV

OE0

FBOUT

nFBOUT

V_DDO

OE1

OE2

GND

Q_TYPE

15 16 17 18 19 20 21 22 23 24 25 26 27 28

ICS8743008I

56-Lead VFQFN

8mm x 8mm x 0.925mm package body

K Package

Top View

The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization and/or qualification.

Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.

IDT™ / ICS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR 1

ICS8743008DKI REV. A AUGUST 25, 2008

12 3 4 5 6 7...28

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与ICS8743008I相关器件

型号	品牌	获取价格	描述	数据表
ICS8745AY	IDT	获取价格	PLL Based Clock Driver, 5 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM
ICS8745AYLF	IDT	获取价格	PLL Based Clock Driver, 5 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM
ICS8745AYLFT	IDT	获取价格	PLL Based Clock Driver, 5 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM
ICS8745AYT	IDT	获取价格	PLL Based Clock Driver, 5 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM
ICS8745B	ICSI	获取价格	1:5 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR
ICS8745BM-21	IDT	获取价格	PLL Based Clock Driver, 8745 Series, 1 True Output(s), 0 Inverted Output(s), PDSO20, 7.50
ICS8745BM-21LF	IDT	获取价格	PLL Based Clock Driver, 8745 Series, 1 True Output(s), 0 Inverted Output(s), PDSO20, 7.50
ICS8745BM-21LFT	IDT	获取价格	PLL Based Clock Driver, 8745 Series, 1 True Output(s), 0 Inverted Output(s), PDSO20, 7.50
ICS8745BM-21T	IDT	获取价格	PLL Based Clock Driver, 8745 Series, 1 True Output(s), 0 Inverted Output(s), PDSO20, 7.50
ICS8745BMI-21	IDT	获取价格	PLL Based Clock Driver, 8745 Series, 1 True Output(s), 0 Inverted Output(s), PDSO20, 7.50

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