Datasheet > ICS87339AG-11LFT

ICS87339AG-11LFT

更新时间： 2024-09-30 04:54:19

品牌	Logo	应用领域
艾迪悌 - IDT		光电二极管
页数	文件大小	规格书
13页	151K
描述
Low Skew Clock Driver, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.92 MM HEIGHT, MO-153, TSSOP-20

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ICS87339AG-11LFT 数据手册

PRELIMINARY

ICS87339-11

Integrated

Circuit

Systems, Incꢀ

LOW SKEW,

÷2/4,÷4/5/6,

DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK GENERATOR

GENERAL DESCRIPTION

FEATURES

The ICS87339-11 is a low skew, high perfor- • 2 divide by 2/4 differential 3.3V LVPECL outputs;

mance Differential-to-3.3V LVPECL / ECL Clock

Generator/Divider and a member of the

HiPerClockS™ family of High Performance Clock

Solutions from ICS. The ICS87339-11 has one

2 divide by 4/5/6 differential 3.3V LVPECL outputs

HiPerClockS™

• 1 differential CLK, nCLK input pair

• CLK, nCLK pair can accept the following differential

differential clock input pair. The CLK, nCLK pair can accept

most standard differential input levels. The clock enable is

internally synchronized to eliminate runt pulses on the

outputs during asynchronous assertion/deassertion of the

clock enable pin.

input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL

• Input frequency: >1GHz (typical)

• Translates any single ended input signal (LVCMOS, LVTTL,

GTL) to LVPECL levels with resistor bias on nCLK input

Guaranteed output and part-to-part skew characteristics

make the ICS87339-11 ideal for clock distribution applications

demanding well defined performance and repeatability.

• Output skew: 38ps (maximum)

• Part-to-part skew: 375ps (maximum)

• Bank skew: Bank A - TBD,

Bank B - TBD

• Propagation delay: 2.1ns (maximum)

• LVPECLmode operating voltage supply range:

V_CC= 3V to 3.6V, V_EE= 0V

• ECL mode operating voltage supply range:

V_CC= 0V, V_EE= -3V to -3.6V

• -40°C to 85°C ambient operating temperature

• Compatible with MC10EP139, MC100EP139

BLOCK DIAGRAM

PIN ASSIGNMENT

DIV_SELA

VCC

nCLK_EN

DIV_SELB0

CLK

V^CC

QA0

nQA0

QA0

nQA0

QA1

nQA1

QB0

nQB0

QB1

nQB1

V^EE

nCLK_EN

÷2, ÷4

QA1

nQA1

nCLK

CLK

nCLK

V^CC

DIV_SELB1

DIV_SELA

QB0

nQB0

ICS87339-11

20-Lead TSSOP

6.50mm x 4.40mm x 0.92 package body

G Package

÷4, ÷5, ÷6

QB1

nQB1

DIV_SELB0

DIV_SELB1

Top View

20-Lead SOIC

7.5mm x 12.8mm x 2.25mm package body

M Package

Top View

The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial

product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.

87339AG-11

www.icst.com/products/hiperclocks.html

REV. A MAY 15, 2003

12 3 4 5 6 7...13

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与ICS87339AG-11LFT相关器件

型号	品牌	获取价格	描述	数据表
ICS87339AG-11T	IDT	获取价格	Low Skew Clock Driver, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.9
ICS87339AM-01	IDT	获取价格	Low Skew Clock Driver, 87339 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 7.50
ICS87339AM-01LF	IDT	获取价格	Low Skew Clock Driver, 87339 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 7.50
ICS87339AM-01LFT	IDT	获取价格	Low Skew Clock Driver, 87339 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 7.50
ICS87339AM-11	IDT	获取价格	Low Skew Clock Driver, 4 True Output(s), 0 Inverted Output(s), PDSO20, 7.50 X 12.80 MM, 2.
ICS87339AM-11LF	IDT	获取价格	Low Skew Clock Driver, 4 True Output(s), 0 Inverted Output(s), PDSO20, 7.50 X 12.80 MM, 2.
ICS87339AM-11LFT	IDT	获取价格	Low Skew Clock Driver, 4 True Output(s), 0 Inverted Output(s), PDSO20, 7.50 X 12.80 MM, 2.
ICS87339AMI-11LF	IDT	获取价格	Low Skew Clock Driver, 87339 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 7.50
ICS87339AMI-11LFT	IDT	获取价格	Low Skew Clock Driver, 87339 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 7.50
ICS8733BY-01	IDT	获取价格	PLL Based Clock Driver, 2 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM

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