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ICS8732AYI-01LFT PDF预览

ICS8732AYI-01LFT

更新时间： 2024-09-29 21:17:59
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
16页 160K
描述
PLL Based Clock Driver, 8732 Series, 8 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026, LQFP-52

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ICS8732AYI-01LFT 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFP
包装说明：LQFP, QFP52,.47SQ针数：52
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.29系列：8732
输入调节：DIFFERENTIAL MUXJESD-30 代码：S-PQFP-G52
JESD-609代码：e3长度：10 mm
逻辑集成电路类型：PLL BASED CLOCK DRIVER湿度敏感等级：3
功能数量：1反相输出次数：
端子数量：52实输出次数：8
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：LQFP
封装等效代码：QFP52,.47SQ封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE峰值回流温度（摄氏度）：260
电源：3.3 V认证状态：Not Qualified
Same Edge Skew-Max（tskwd）：0.075 ns座面最大高度：1.6 mm
子类别：Clock Drivers最大供电电压 (Vsup)：3.465 V
最小供电电压 (Vsup)：3.135 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn) - annealed端子形式：GULL WING
端子节距：0.65 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：10 mm
Base Number Matches：1

ICS8732AYI-01LFT 数据手册

 浏览型号ICS8732AYI-01LFT的Datasheet PDF文件第2页浏览型号ICS8732AYI-01LFT的Datasheet PDF文件第3页浏览型号ICS8732AYI-01LFT的Datasheet PDF文件第4页浏览型号ICS8732AYI-01LFT的Datasheet PDF文件第5页浏览型号ICS8732AYI-01LFT的Datasheet PDF文件第6页浏览型号ICS8732AYI-01LFT的Datasheet PDF文件第7页 
ICS8732I-01  
LOW VOLTAGE, LOW SKEW  
3.3V LVPECL CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
GENERAL DESCRIPTION  
Features  
• 10 differential 3.3V LVPECL outputs  
The ICS8732I-01 is a low voltage, low skew,  
ICS  
HiPerClockS™  
3.3V LVPECL Clock Generator and a member  
of the HiPerClockS™ family of High Per-  
formance Clock Solutions from ICS. The  
ICS8732I-01 has two selectable clock inputs.  
• Selectable differential CLK0, nCLK0 or LVCMOS/LVTTL  
CLK1 inputs  
• CLK0, nCLK0 supports the following input types: LVPECL,  
LVDS, LVHSTL, SSTL, HCSL  
The CLK0, nCLK0 pair can accept most standard differen-  
tial input levels. The single ended clock input accepts  
LVCMOS or LVTTL input levels. The ICS8732I-01 has a  
fully integrated PLL along with frequency configurable  
outputs. An external feedback input and outputs regener-  
ate clocks with “zero delay”.  
• CLK1 accepts the following input levels: LVCMOS or  
LVTTL  
• Maximum output frequency: 350MHz  
• VCO range: 250MHz to 700MHz  
• External feedback for “zero delay” clock regeneration with  
configurable frequencies  
The ICS8732I-01 has multiple divide select pins for each  
bank of outputs along with 3 independent feedback divide  
select pins allowing the ICS8732I-01 to function both as a  
frequency multiplier and divider. The PLL_SEL input can  
be used to bypass the PLL for test and system debug pur-  
poses. In bypass mode, the input clock is routed around  
the PLL and into the internal output dividers.  
• Cycle-to-cycle jitter: CLK0, nCLK0, 50ps (maximum),  
CLK1, 80ps (maximum)  
• Output skew: 75ps (maximum)  
• Static phase offset: -100ps to 200ps  
• Full 3.3V supply mode  
• -40°C to 85°C ambient operating temperature  
• Available in both, Standardd and RoHS/Lead-Free  
compliant packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
CLK_SEL  
CLK0  
0
QA0  
nCLK0  
CLK1  
0
1
÷2 ÷4 ÷6 ÷8  
nQA0  
52 51 50 49 48 47 46 45 44 43 42 41 40  
1
÷2 ÷4 ÷8 ÷12  
PLL  
VCCO  
QA0  
1
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
VCCO  
nQB3  
QB3  
nQB2  
QB2  
VEE  
QA1  
nQA1  
2
FB_IN  
÷4 ÷6 ÷8 ÷10  
nFB_IN  
÷8 ÷12 ÷16 ÷20  
QA2  
nQA2  
nQA0  
QA1  
3
4
QA3  
nQA3  
nQA1  
VEE  
5
PLL_SEL  
6
PLL_SEL  
VCCO  
QA2  
QB0  
7
MR  
ICS8732I-01  
DIV_SELA0  
DIV_SELA1  
DIV_SELB0  
DIV_SELB1  
FBDIV_SEL0  
FBDIV_SEL1  
FBDIV_SEL2  
nQB0  
8
VCCO  
nQB1  
QB1  
nQB0  
QB0  
VEE  
QB1  
nQB1  
9
nQA2  
QA3  
10  
11  
12  
13  
QB2  
nQB2  
nQA3  
VEE  
QB3  
nQB3  
14 15 16 17 18 19 20 21 22 23 24 25 26  
QFB0  
nQFB0  
QFB1  
nQFB1  
52-Lead LQFP  
10mm x 10mm x 1.4mm package body  
Y package  
MR  
TopView  
8732AYI-01  
www.icst.com/products/hiperclocks.html  
REV.A AUGUST 9, 2005  
1
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与ICS8732AYI-01LFT相关器件

型号 品牌 获取价格 描述 数据表
ICS8732AYI-01T IDT

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 		PLL Based Clock Driver, 8732 Series, 8 True Output(s), 0 Inverted Output(s), PQFP52, 10 X
ICS87332AMI-01 IDT

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 		Low Skew Clock Driver, 87332 Series, 1 True Output(s), 0 Inverted Output(s), PDSO8, 3.90 X
ICS87332AMI-01LF IDT

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 		Low Skew Clock Driver, 87332 Series, 1 True Output(s), 0 Inverted Output(s), PDSO8, 3.90 X
ICS87332AMI-01LFT IDT

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 		Low Skew Clock Driver, 87332 Series, 1 True Output(s), 0 Inverted Output(s), PDSO8, 3.90 X
ICS87332AMI-01T IDT

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 		Low Skew Clock Driver, 87332 Series, 1 True Output(s), 0 Inverted Output(s), PDSO8, 3.90 X
ICS87339AG-01LF IDT

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 		Low Skew Clock Driver, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 X 0.92
ICS87339AG-11 IDT

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 		Low Skew Clock Driver, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.9
ICS87339AG-11LF IDT

获取价格

 		Low Skew Clock Driver, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.9
ICS87339AG-11LFT IDT

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 		Low Skew Clock Driver, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.9
ICS87339AG-11T IDT

获取价格

 		Low Skew Clock Driver, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.9

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