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ICS8430S10I-03 PDF预览

ICS8430S10I-03

更新时间: 2024-11-03 11:14:39
品牌 Logo 应用领域
艾迪悌 - IDT 时钟发生器
页数 文件大小 规格书
31页 1080K
描述
Clock Generator for Cavium Processors

ICS8430S10I-03 数据手册

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Clock Generator for Cavium Processors  
ICS8430S10I-03  
DATA SHEET  
General Description  
Features  
The ICS8430S10I-03 is a PLL-based clock generator specifically  
designed for Cavium Networks SoC processors. This high  
performance device is optimized to generate the processor core  
reference clock, the DDR reference clocks, the PCI/PCI-X bus  
clocks, and the clocks for both the Gigabit Ethernet MAC and PHY.  
The clock generator offers low-jitter, low-skew clock outputs, and  
edge rates that easily meet the input requirements for the  
CN30XX/CN31XX/CN38XX/CN58XX processors. The output  
frequencies are generated from a 25MHz external input source or an  
external 25MHz parallel resonant crystal. The extended temperature  
range of the ICS8430S10I-03 supports telecommunication,  
networking, and storage requirements.  
One selectable differential output pair for DDR 533/400/667,  
LVPECL, LVDS interface levels  
Nine LVCMOS/ LVTTL outputs, 23typical output impedance  
Selectable external crystal or differential input source  
Crystal oscillator interface designed for 25MHz, parallel resonant  
crystal  
Differential input pair (PCLK, nPCLK) accepts LVPECL, LVDS,  
CML, SSTL input levels  
Internal resistor bias on nPCLK pin allows the user to drive PCLK  
input with external single-ended (LVCMOS/ LVTTL) input levels  
Power supply modes:  
CORE / OUTPUT  
3.3V / 3.3V LVDS, LVPECL, LVCMOS  
3.3V / 2.5V LVCMOS  
-40°C to 85°C ambient operating temperature  
Available in lead-free (RoHS 6) package  
Applications  
Systems using Cavium Processors  
Pin Assignment  
CPE Gateway Design  
Home Media Servers  
802.11n AP or Gateway  
Soho Secure Gateway  
Soho SME Gateway  
Wireless Soho and SME VPN Solutions  
Wired and Wireless Network Security  
Web Servers and Exchange Servers  
48 47 46 45 44 43 42 41 40 39 38 37  
VDD  
nOE_D  
GND  
VDDO_CD  
QC  
QD0  
QD1  
CORE_SEL  
GND  
1
2
3
4
5
6
7
8
9
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
nPLL_ SEL  
ICS8430S10I-03  
48 TQFP, E-Pad  
XTAL  
_IN  
7mm x 7mm x 1mm package  
_ OUT  
XTAL  
body  
nXTAL  
_ SEL  
PCLK  
GND  
Y Package  
Top View  
nOE_REF  
VDDO_B  
QB0  
QB1  
VDDO_B  
nPCLK  
nOE_C  
ToVew  
10  
nOE_B  
GND  
11  
12  
15 16 17 18 19 20 21 22 23  
13 14  
24  
ICS8430S10BYI-03 REVISION A FEBRUARY 22, 2011  
1
©2011 Integrated Device Technology, Inc.  

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