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ICS843101AG-312LFT PDF预览

ICS843101AG-312LFT

更新时间: 2024-11-03 11:14:39
品牌 Logo 应用领域
矽成 - ICSI 晶体外围集成电路光电二极管时钟
页数 文件大小 规格书
14页 183K
描述
FEMTOCLOCKS? CRYSTAL-TO-LVPECL 312.5MHZ FREQUENCY MARGINING SYNTHESIZER

ICS843101AG-312LFT 数据手册

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ADVANCE INFORMATION  
ICS843101-312  
Integrated  
Circuit  
FEMTOCLOCKS™ C RYSTAL-TO-LVPECL  
Systems, Inc.  
312.5MHZ FREQUENCY MARGINING SYNTHESIZER  
GENERAL DESCRIPTION  
FEATURES  
One 312.5MHz nominal LVPECL output  
The ICS843101-312 is a low phase-noise  
ICS  
frequency margining synthesizer with fre-  
quency margining capability and is a member of  
the HiPerClockSfamily of high performance  
clock solutions from ICS. In the default mode,  
• Selectable crystal oscillator interface designed for 25MHz,  
18pF parallel resonant crystal or LVCMOS single-ended  
input  
HiPerClockS™  
the device nominally generates a 312.5MHz LVPECL output • Output frequency can be varied in 2% steps from nominal  
clock signal from a 25MHz crystal input. There is also a  
frequency margining mode available where the device can  
• VCO range: 560MHz - 690MHz  
be programmed, using the serial interface, to vary the  
output frequency up or down from nominal in 2% steps.  
The ICS843101-312 is provided in a 16-pin TSSOP.  
• RMS phase jitter @ 312.5MHz, using a 25MHz crystal  
(1.875MHz-20MHz): <1ps (typical) design target  
• Output supply modes  
Core/Output  
3.3V/3.3V  
3.3V/2.5V  
2.5V/2.5V  
• 0°C to 70°C ambient operating temperature  
• Available in both standard and lead-free RoHS-complaint  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
Pullup  
OE  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VEE  
S_LOAD  
S_DATA  
S_CLOCK  
SEL  
MODE  
VCCO  
Q
nQ  
VEE  
CLK  
XTAL_OUT  
XTAL_IN  
Pulldown  
CLK  
1
0
Q
25MHz  
Phase  
Detector  
÷ P  
VCO  
÷ N  
560 - 690MHz  
XTAL_IN  
nQ  
OE  
VCCA  
OSC  
XTAL_OUT  
SEL  
VCC  
Pulldown  
÷ M  
ICS843101-312  
16-LeadTSSOP  
4.4mm x 5.0mm x 0.92mm  
package body  
Pulldown  
S_CLOCK  
S_DATA  
S_LOAD  
MODE  
Pulldown  
Pulldown  
Pulldown  
Serial Control  
G Package  
TopView  
The Advance Information presented herein represents a product currently in design or being considered for design.The noted characteristics are  
design targets. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.  
843101AG-312  
www.icst.com/products/hiperclocks.html  
OCTOBER 18, 2005  
1

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