PRELIMINARY
ICS84314-02
Integrated
Circuit
Systems, Inc.
700MHZ, CRYSTAL-TO-3.3V/2.5V LVPECL
FREQUENCY SYNTHESIZER W/FANOUT BUFFER
FEATURES
GENERAL DESCRIPTION
• Fully integrated PLL
The ICS84314-02 is a general purpose quad
ICS
output frequency synthesizer and a member of
the HiPerClockS™family of High Performance
• Four differential 3.3V or 2.5V LVPECL outputs
HiPerClockS™
Clock Solutions from ICS.When the device uses • Selectable crystal oscillator interface
parallel loading, the M bits are programmable and
or LVCMOS/LVTTLTEST_CLK input
• Output frequency range: 31.25MHz to 700MHz
• VCO range: 250MHz to 700MHz
the output divider is hard-wired for divide by 2 thus providing
a frequency range of 125MHz to 350MHz. In serial program-
ming mode, the M bits are programmable and the output
divider can be set for either divide by 1, 2, 4 or divide by 8,
providing a frequency range of 31.25MHz to 700MHz.
Additionally, the device supports spread spectrum clocking
(SSC) for minimizing Electromagnetic Interference (EMI).The
low cycle-cycle jitter and broad frequency range of the
ICS84314-02 make it an ideal clock generator for a variety of
demanding applications which require high performance.
• Supports Spread Spectrum Clocking (SSC)
• Parallel interface for programming counter
and output dividers during power-up
• Serial 3 wire interface
• Cycle-to-cycle jitter: 20ps (typical)
• Output skew: TBD
• Output duty cycle: TBD
• Full 3.3V or mixed 3.3V core, 2.5V output operating supply
• 0°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS-complaint
packages
BLOCK DIAGRAM
PIN ASSIGNMENT
32 31 30 29 28 27 26 25
VCO_SEL
XTAL_SEL
M4
M5
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
TEST_CLK
XTAL_SEL
VCCA
TEST_CLK
0
ICS84314-02
32-Lead LQFP
7mm x 7mm x 1.4mm
package body
Y Package
M6
M7
S_LOAD
S_DATA
S_CLOCK
MR
XTAL_IN
1
OSC
M8
XTAL_OUT
VEE
÷ 16
VCC
VCCO
TopView
VCCO
Q0
nQ0
9
10 11 12 13 14 15 16
PLL
Output Divider N
÷1 Serial Mode
÷2 Parallel/Serial Mode
(Power-up Default)
÷4 Serial Mode
PHASE DETECTOR
Q1
nQ1
MR
0
1
VCO
Q2
nQ2
÷8 Serial Mode
Q3
nQ3
÷ M
÷2
S_LOAD
S_DATA
S_CLOCK
CONFIGURATION
INTERFACE
LOGIC
nP_LOAD
M0:M8
The Preliminary Information presented herein represents a product in prototyping or pre-production.The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
84314AY-02
www.icst.com/products/hiperclocks.html
REV.B NOVEMBER 17, 2005
1