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ICS843004AG-01LFT PDF预览

ICS843004AG-01LFT

更新时间: 2024-11-02 21:08:07
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
17页 676K
描述
Clock Generator, 156.25MHz, PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24

ICS843004AG-01LFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:End Of Life零件包装代码:TSSOP
包装说明:4.40 X 7.80 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-24针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.2
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:7.8 mm湿度敏感等级:1
端子数量:24最高工作温度:85 °C
最低工作温度:-30 °C最大输出时钟频率:170 MHz
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP24,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V主时钟/晶体标称频率:25 MHz
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Clock Generators最大压摆率:135 mA
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

ICS843004AG-01LFT 数据手册

 浏览型号ICS843004AG-01LFT的Datasheet PDF文件第2页浏览型号ICS843004AG-01LFT的Datasheet PDF文件第3页浏览型号ICS843004AG-01LFT的Datasheet PDF文件第4页浏览型号ICS843004AG-01LFT的Datasheet PDF文件第5页浏览型号ICS843004AG-01LFT的Datasheet PDF文件第6页浏览型号ICS843004AG-01LFT的Datasheet PDF文件第7页 
FEMTOCLOCKS™ CRYSTAL-TO-3.3V  
LVPECL FREQUENCY SYNTHESIZER  
ICS843004-01  
GENERAL DESCRIPTION  
FEATURES  
The ICS843004-01 is a 4 output LVPECL  
• Four 3.3V LVPECL outputs  
ICS  
HiPerClockS™  
synthesizer optimized to generate Ethernet  
reference clock frequencies and is a member of  
the HiPerClocksTM family of high performance clock  
solutions from ICS. Using a 25MHz 18pF parallel  
• Selectable crystal oscillator interface  
or LVCMOS/LVTTL single-ended input  
• Supports the following output frequencies:  
156.25MHz, 125MHz and 62.5MHz  
resonant crystal, the following frequencies can be generated  
based on the settings of 2 frequency select pins (F_SEL[1:0]):  
156.25MHz, 125MHz, 62.5MHz. The ICS843004-01 uses ICS’  
3rd generation low phase noise VCO technology and can achieve  
1ps or lower typical rms phase jitter, easily meeting Ethernet  
jitter requirements. The ICS843004-01 is packaged in a small  
24-pin TSSOP package.  
• VCO range: 560MHz - 680MHz  
• RMS phase jitter @ 156.25MHz, using a 25MHz crystal  
(1.875MHz - 20MHz): 0.57ps (typical)  
• RMS phase noise at 156.25MHz (typical)  
Phase noise:  
Offset  
Noise Power  
100Hz ............... -95.5 dBc/Hz  
1kHz ................ -118 dBc/Hz  
10kHz ................ -126 dBc/Hz  
100kHz ............. -126.6 dBc/Hz  
• Full 3.3V supply mode  
• -30°C to 85°C ambient operating temperature  
• Available in both standard and lead-free RoHS compliant  
packages  
FREQUENCY SELECT FUNCTION TABLE  
PIN ASSIGNMENT  
Inputs  
M Divider N Divider  
Value  
25  
Output Frequency  
(25MHz Ref.)  
M/N  
Divider Value  
1
24  
23  
22  
21  
20  
19  
18  
nQ2  
Q2  
nQ1  
Q1  
F_SEL1 F_SEL0  
Value  
4
2
3
4
VCCo  
Q0  
VCCO  
Q3  
0
0
1
1
0
1
0
1
6.25  
156.25  
125  
25  
25  
25  
5
5
5
nQ0  
nQ3  
6
MR  
VEE  
10  
2.5  
62.5  
7
8
9
10  
11  
12  
nPLL_SEL  
nc  
VCC  
nXTAL_SEL  
not used  
not used  
17  
16  
15  
14  
13  
VCCA  
TEST_CLK  
VEE  
XTAL_IN  
F_SEL0  
VCC  
BLOCK DIAGRAM  
Pulldown  
F_SEL1  
XTAL_OUT  
F_SEL[1:0]  
2
Pulldown  
ICS843004-01  
24-Lead TSSOP  
4.40mm x 7.8mm x 0.92mm  
package body  
nPLL_SEL  
Q0  
F_SEL[1:0]  
0 0 ÷4  
Pulldown  
nQO  
Q1  
TEST_CLK  
1
0
1
0 1 ÷5  
G Package  
Top View  
25MHz  
XTAL_IN  
1 0 ÷10  
VCO  
625MHz  
(w/25MHz  
Reference)  
1 1 not used  
Phase  
Detector  
nQ1  
OSC  
0
XTAL_OUT  
Pulldown  
nXTAL_SEL  
Q2  
nQ2  
M = 25 (fixed)  
Q3  
nQ3  
Pulldown  
MR  
IDT/ ICS3.3V LVPECL FREQUENCY SYNTHESIZER  
1
ICS843004-01 REV B JUNE 30, 2006  

ICS843004AG-01LFT 替代型号

型号 品牌 替代类型 描述 数据表
843004AG-01LFT IDT

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