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ICS843003AGI-01LF PDF预览

ICS843003AGI-01LF

更新时间: 2024-11-02 15:46:27
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
16页 1095K
描述
Clock Generator, 680MHz, PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-24

ICS843003AGI-01LF 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP24,.25针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.35
Is Samacsys:NJESD-30 代码:R-PDSO-G24
JESD-609代码:e3长度:7.8 mm
湿度敏感等级:1端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:680 MHz封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP24,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
主时钟/晶体标称频率:27.2 MHz认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Clock Generators
最大压摆率:150 mA最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

ICS843003AGI-01LF 数据手册

 浏览型号ICS843003AGI-01LF的Datasheet PDF文件第2页浏览型号ICS843003AGI-01LF的Datasheet PDF文件第3页浏览型号ICS843003AGI-01LF的Datasheet PDF文件第4页浏览型号ICS843003AGI-01LF的Datasheet PDF文件第5页浏览型号ICS843003AGI-01LF的Datasheet PDF文件第6页浏览型号ICS843003AGI-01LF的Datasheet PDF文件第7页 
FEMTOCLOCK™ CRYSTAL-TO-3.3V  
LVPECL FREQUENCY SYNTHESIZER  
ICS843003I-01  
GENERAL DESCRIPTION  
FEATURES  
• Three 3.3V LVPECL outputs on two banks, A Bank with one  
LVPECL pair and B Bank with two LVPECL output pairs  
The ICS843003I-01 is a 3 differential output  
LVPECL Synthesizer designed to generate Ethernet  
ICS  
HiPerClockS™  
reference clock frequencies and is a member of  
the HiPerClocksfamily of high performance clock  
solutions from ICS. Using a 19.53125MHz or  
• Using a 19.53125MHz or 25MHz crystal, the two output  
banks can be independently set for 625MHz, 312.5MHz,  
156.25MHz or 125MHz  
25MHz, 18pF parallel resonant crystal, the following frequencies  
can be generated based on the settings of 4 frequency select  
pins (DIV_SEL[A1:A0], DIV_SEL[B1:B0]): 625MHz, 312.5MHz,  
156.25MHz, and 125MHz. The 843003I-01 has 2 output banks,  
Bank A with 1 differential LVPECL output pair and Bank B with  
2 differential LVPECL output pairs.  
• Selectable crystal oscillator interface or LVCMOS/LVTTL  
single-ended input  
• VCO range: 490MHz to 680MHz  
• RMS phase jitter @ 156.25MHz (1.875MHz - 20MHz):  
0.53ps (typical)  
• 3.3V output supply mode  
The two banks have their own dedicated frequency select  
pins and can be independently set for the frequencies  
mentioned above. The ICS843003I-01 uses ICS’ 3rd  
generation low phase noise VCO technology and can  
achieve 1ps or lower typical rms phase jitter, easily meeting  
Ethernet jitter requirements. The ICS843003I-01 is  
packaged in a small 24-pin TSSOP package.  
• -40°C to 85°C ambient operating temperature  
• Available in both standard and lead-free RoHS compliant  
packages  
PIN ASSIGNMENT  
BLOCK DIAGRAM  
DIV_SELB0  
VCO_SEL  
MR  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
DIV_SELB1  
VCCO_B  
QB0  
2
3
4
VCCO_A  
nQB0  
Pullup  
OEA  
5
6
7
8
QA0  
nQA0  
OEB  
OEA  
FB_DIV  
QB1  
nQB1  
XTAL_SEL  
REF_CLK  
Pullup  
DIV_SELA[1:0]  
Pullup  
VCO_SEL  
QA0  
9
XTAL_IN  
XTAL_OUT  
VEE  
0 0 ÷1  
10  
11  
12  
Pulldown  
nQA0  
VCCA  
VCC  
0 1 ÷2  
REF_CLK  
XTAL_IN  
0
1
0
1
1 0 ÷3  
DIV_SELA1  
DIV_SELA0  
1 1 ÷4 (default)  
ICS843003I-01  
24-Lead TSSOP  
4.40mm x 7.8mm x 0.92mm  
package body  
Phase  
Detector  
VCO  
OSC  
XTAL_OUT  
XTAL_SEL  
Pullup  
QB0  
FB_DIV  
0 0 ÷2  
G Package  
Top View  
nQB0  
0 1 ÷4  
0 = ÷25 (default)  
1 = ÷32  
1 0 ÷5  
QB1  
1 1 ÷8 (default)  
Pulldown  
Pullup  
FB_DIV  
DIV_SELB[1:0]  
MR  
nQB1  
Pulldown  
Pullup  
OEB  
IDT/ ICS3.3V LVPECL FREQUENCY SYNTHESIZER  
1
ICS843003AGI-01 REV A March 2, 2009  

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