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ICS8421002IAGIT PDF预览

ICS8421002IAGIT

更新时间: 2024-11-21 21:12:03
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艾迪悌 - IDT /
页数 文件大小 规格书
13页 196K
描述
PLL/Frequency Synthesis Circuit

ICS8421002IAGIT 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.92
Base Number Matches:1

ICS8421002IAGIT 数据手册

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PRELIMINARY  
ICS8421002I  
FEMTOCLOCKS™ CRYSTAL-TO-  
HSTL FREQUENCY SYNTHESIZER  
Integrated  
Circuit  
Systems, Inc.  
GENERAL DESCRIPTION  
FEATURES  
The ICS8421002I is a 2 output HSTL Synthesizer Two HSTL outputs (VOHmax = 1.4V)  
ICS  
optimized to generate Fibre Channel reference  
• Selectable crystal oscillator interface  
HiPerClockS™  
clock frequencies and is a member of the  
or LVCMOS/LVTTL single-ended input  
HiPerClocksTM family of high performance clock  
solutions from ICS. Using a 26.5625MHz 18pF  
• Supports the following output frequencies: 212.5MHz,  
187.5MHz, 159.375MHz, 106.25MHz, 53.125MHz  
parallel resonant crystal, the following frequencies can be  
generated based on the 2 frequency select pins (F_SEL[1:0]):  
212.5MHz, 187.5MHz, 159.375MHz, 106.25MHz and  
53.125MHz. The ICS8421002I uses ICS’ 3rd generation low  
phase noise VCO technology and can achieve 1ps or lower  
typical rms phase jitter, easily meeting Fibre Channel jitter  
requirements.The ICS8421002I is packaged in a small 20-pin  
TSSOP package.  
• VCO range: 560MHz - 680MHz  
• RMS phase jitter @ 212.5MHz, using a 26.5625MHz crystal  
(637kHz - 10MHz): 0.59ps (typical)  
• Power supply modes:  
Core/Output  
3.3V/1.8V  
2.5V/1.8V  
• -40°C to 85°C ambient operating temperature  
FREQUENCY SELECT FUNCTION TABLE  
PIN ASSIGNMENT  
nc  
VDDO  
Q0  
VDDO  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Inputs  
Input  
Frequency  
(MHz)  
Output  
Frequency  
(MHz)  
Q1  
2
M Divider N Divider  
M/N  
Divider Value  
nQ1  
3
F_SEL1 F_SEL0  
GND  
VDD  
nQ0  
MR  
Value  
24  
Value  
3
4
5
26.5625  
26.5625  
26.5625  
26.5625  
23.4375  
0
0
1
1
0
0
1
0
1
0
8
6
4
2
8
212.5  
159.375  
106.25  
53.125  
187.5  
nXTAL_SEL  
TEST_CLK  
XTAL_IN  
XTAL_OUT  
F_SEL1  
nPLL_SEL  
nc  
VDDA  
F_SEL0  
VDD  
6
7
8
9
24  
24  
24  
24  
4
6
12  
3
10  
ICS8421002I  
20-Lead TSSOP  
6.5mm x 4.4mm x 0.92mm  
package body  
G Package  
Top View  
BLOCK DIAGRAM  
F_SEL[1:0]  
Pulldown  
2
Pulldown  
nPLL_SEL  
Q0  
F_SEL[1:0]  
nQO  
Pulldown  
TEST_CLK  
0 0 ÷3  
0 1 ÷4  
1 0 ÷6  
1 1 ÷12  
1
0
1
0
26.5625MHz  
XTAL_IN  
Q1  
Phase  
Detector  
VCO  
OSC  
nQ1  
XTAL_OUT  
Pulldown  
nXTAL_SEL  
M = 24 (fixed)  
Pulldown  
MR  
The Preliminary Information presented herein represents a product in prototyping or pre-production.The noted characteristics are based on initial  
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.  
8421002AGI  
www.icst.com/products/hiperclocks.html  
REV. A MARCH 29, 2005  
1

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