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ICS8422002AGI-01 PDF预览

ICS8422002AGI-01

更新时间: 2024-11-02 03:39:23
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矽成 - ICSI /
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描述
FEMTOCLOCKS⑩ CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER

ICS8422002AGI-01 数据手册

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PRELIMINARY  
ICS8422002I-01  
Integrated  
Circuit  
Systems, Inc.  
FEMTOCLOCKS™ CRYSTAL-TO-  
LVHSTL FREQUENCY SYNTHESIZER  
GENERAL DESCRIPTION  
FEATURES  
The ICS8422002I-01 is a 2 output LVHSTL Two LVHSTL outputs (VOHmax = 1.2V)  
ICS  
HiPerClockS™  
Synthesizer optimized to generate Ethernet  
• Selectable crystal oscillator interface  
reference clock frequencies and is a member of  
or LVCMOS/LVTTL single-ended input  
the HiPerClocksTM family of high performance  
clock solutions from ICS. Using a 25MHz 18pF  
• Supports the following output frequencies: 156.25MHz,  
125MHz, 62.5MHz  
parallel resonant crystal, the following frequencies can be  
generated based on the 2 frequency select pins (F_SEL[1:0]):  
156.25MHz, 125MHz and 62.5MHz. The ICS8422002I-01  
uses ICS’ 3rd generation low phase noise VCO technology  
and can achieve 1ps or lower typical rms phase jitter, easily  
meeting Ethernet jitter requirements.The ICS8422002I-01 is  
packaged in a small 20-pin TSSOP package.  
• VCO range: 560MHz - 680MHz  
• RMS phase jitter @ 156.25MHz, using a 25MHz crystal  
(1.875MHz - 20MHz): 0.44ps (typical)  
• Power supply modes:  
Core/Output  
3.3V/1.8V  
2.5V/1.8V  
• -40°C to 85°C ambient operating temperature  
• Available in both standard and lead-free RoHS compliant  
packages  
FREQUENCY SELECT FUNCTION TABLE  
PIN ASSIGNMENT  
nc  
VDDO  
Q0  
VDDO  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Q1  
2
Output Frequency  
M Divider N Divider  
nQ1  
3
(25MHz Ref.)  
F_SEL1 F_SEL0  
GND  
VDD  
nQ0  
MR  
Value  
Value  
4
5
0
0
1
1
0
1
0
1
25  
4
156.25  
125  
nXTAL_SEL  
TEST_CLK  
XTAL_IN  
XTAL_OUT  
F_SEL1  
nPLL_SEL  
nc  
VDDA  
F_SEL0  
VDD  
6
7
8
9
25  
25  
5
10  
62.5  
not used  
not used  
10  
ICS8422002I-01  
20-Lead TSSOP  
6.5mm x 4.4mm x 0.92mm  
BLOCK DIAGRAM  
F_SEL[1:0]  
package body  
G Package  
Top View  
Pulldown  
2
Pulldown  
nPLL_SEL  
Q0  
F_SEL[1:0]  
0 0 ÷4  
nQ0  
Pulldown  
TEST_CLK  
1
0
1
0
0 1 ÷5  
25MHz  
XTAL_IN  
1 0 ÷10  
1 1 Not Used  
Q1  
Phase  
Detector  
VCO  
OSC  
nQ1  
XTAL_OUT  
Pulldown  
nXTAL_SEL  
M = 25 (fixed)  
Pulldown  
MR  
The Preliminary Information presented herein represents a product in prototyping or pre-production.The noted characteristics are based on initial  
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.  
8422002AGI-01  
www.icst.com/products/hiperclocks.html  
REV.B NOVEMBER 14, 2005  
1

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