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ICS291PGLFT PDF预览

ICS291PGLFT

更新时间： 2024-09-15 19:59:39
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
10页 160K
描述
Clock Generator, 200MHz, CMOS, PDSO20, 0.173 INCH, ROHS COMPLIANT, TSSOP-20

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中文翻译

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ICS291PGLFT 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：0.173 INCH, ROHS COMPLIANT, TSSOP-20针数：20
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.28
JESD-30 代码：R-PDSO-G20JESD-609代码：e3
长度：6.5 mm湿度敏感等级：1
端子数量：20最高工作温度：70 °C
最低工作温度：最大输出时钟频率：200 MHz
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260主时钟/晶体标称频率：166 MHz
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压：3.465 V最小供电电压：3.135 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Matte Tin (Sn) - annealed端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30宽度：4.4 mm
uPs/uCs/外围集成电路类型：CLOCK GENERATOR, OTHERBase Number Matches：1

ICS291PGLFT 数据手册

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DATASHEET  
TRIPLE PLL FIELD PROG. SPREAD SPECTRUM CLOCK SYNTHESIZER ICS291  
Description  
Features  
The ICS291 field programmable spread spectrum clock  
synthesizer generates up to six high-quality, high-frequency  
clock outputs including multiple reference clocks from a  
low-frequency crystal input. It is designed to replace  
crystals, crystal oscillators and stand alone spread  
spectrum devices in most electronic systems.  
• Packaged as 20-pin TSSOP – Pb-free, RoHS compliant  
• Eight addressable registers  
• Replaces multiple crystals and oscillators  
• Output frequencies up to 200 MHz at 3.3 V  
• Configurable Spread Spectrum Modulation  
• Input crystal frequency of 5 to 27 MHz  
• Clock input frequency of 3 to 166 MHz  
• Up to six reference outputs  
TM  
Using IDT’s VersaClock software to configure PLLs and  
outputs, the ICS291 contains a One-Time Programmable  
(OTP) ROM for field programmability. Programming  
features include input/output frequencies, spread spectrum  
amount, eight selectable configuration registers and up to  
two sets of three low-skew outputs.  
• Separate 1.8 to 3.3 V VDDO output level controls for  
each bank of 3 outputs  
• Up to two sets of three low-skew outputs  
• Operating voltages of 3.3 V  
• Controllable output drive levels  
• Advanced, low-power CMOS process  
Each of the two output groups are powered by a separate  
VDDO voltage. VDDO may vary from 1.8 V to VDD.  
Using Phase-Locked Loop (PLL) techniques, the device  
runs from a standard fundamental mode, inexpensive  
crystal, or clock. It can replace multiple crystals and  
oscillators, saving board space and cost.  
The ICS291 is also available in factory programmed custom  
versions for high-volume applications.  
Block Diagram  
VDDO1  
3
VDD  
PLL1 with  
Spread  
Spectrum  
3
S2:S0  
OTP  
CLK1  
CLK2  
CLK3  
ROM  
with PLL  
Values  
Divide  
Logic  
and  
Output  
Enable  
Control  
PLL2  
PLL3  
CLK4  
CLK5  
CLK6  
X1/ICLK  
Crystal  
Oscillator  
Crystal or  
Clock Input  
X2  
3
External capacitors  
are required with a crystal input.  
GND  
VDDO2  
PDTS  
IDT™ / ICS™ TRIPLE PLL FIELD PROG. SPREAD SPECTRUM CLOCK SYNTHESIZER 1  
ICS291  
REV F 051310  
1234567...10

中文翻译

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ICS291PGLFT 替代型号

型号 品牌 替代类型 描述 数据表
291PGILFT IDT

功能相似

 TSSOP-20, Reel
291PGLF IDT

功能相似

 TRIPLE PLL FIELD PROG. SPREAD SPECTRUM CLOCK SYNTHESIZER

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