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ICL7667CPA-T PDF预览

ICL7667CPA-T

更新时间： 2024-09-17 21:13:31
品牌 Logo 应用领域
瑞萨 - RENESAS 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
10页 324K
描述
2 CHANNEL, BUF OR INV BASED MOSFET DRIVER, PDIP8, PLASTIC, MS-001BA, DIP-8

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ICL7667CPA-T 技术参数

生命周期：Obsolete零件包装代码：DIP
包装说明：DIP,针数：8
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.59
高边驱动器：NO接口集成电路类型：BUFFER OR INVERTER BASED MOSFET DRIVER
JESD-30 代码：R-PDIP-T8JESD-609代码：e3
长度：9.585 mm功能数量：2
端子数量：8最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装形状：RECTANGULAR
封装形式：IN-LINE认证状态：Not Qualified
座面最大高度：5.33 mm最大供电电压：15 V
最小供电电压：4.5 V表面贴装：NO
技术：CMOS温度等级：COMMERCIAL
端子面层：MATTE TIN端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
宽度：7.62 mmBase Number Matches：1

ICL7667CPA-T 数据手册

 浏览型号ICL7667CPA-T的Datasheet PDF文件第4页浏览型号ICL7667CPA-T的Datasheet PDF文件第5页浏览型号ICL7667CPA-T的Datasheet PDF文件第6页浏览型号ICL7667CPA-T的Datasheet PDF文件第7页浏览型号ICL7667CPA-T的Datasheet PDF文件第8页浏览型号ICL7667CPA-T的Datasheet PDF文件第9页 
ICL7667  
Dual-In-Line Plastic Packages (PDIP)  
E8.3 (JEDEC MS-001-BA ISSUE D)  
N
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE  
E1  
INDEX  
AREA  
INCHES  
MILLIMETERS  
1 2  
3
N/2  
SYMBOL  
MIN  
MAX  
0.210  
-
MIN  
-
MAX  
5.33  
-
NOTES  
-B-  
-C-  
A
A1  
A2  
B
-
4
-A-  
D
E
0.015  
0.115  
0.014  
0.045  
0.008  
0.355  
0.005  
0.300  
0.240  
0.39  
2.93  
0.356  
1.15  
0.204  
9.01  
0.13  
7.62  
6.10  
4
BASE  
PLANE  
0.195  
0.022  
0.070  
0.014  
0.400  
-
4.95  
0.558  
1.77  
0.355  
10.16  
-
-
A2  
A
-
SEATING  
PLANE  
L
C
L
B1  
C
8, 10  
D1  
B1  
eA  
-
A
A
1
D1  
e
D
5
eC  
C
B
eB  
D1  
E
5
0.010 (0.25) M  
C
B S  
0.325  
0.280  
8.25  
7.11  
6
NOTES:  
E1  
e
5
1. Controlling Dimensions: INCH. In case of conflict between  
0.100 BSC  
0.300 BSC  
2.54 BSC  
7.62 BSC  
-
English and Metric dimensions, the inch dimensions control.  
e
e
6
A
B
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
-
0.430  
0.150  
-
10.92  
3.81  
7
3. Symbols are defined in the “MO Series Symbol List” in Section  
2.2 of Publication No. 95.  
L
0.115  
2.93  
4
9
4. Dimensions A, A1 and L are measured with the package seated  
N
8
8
in JEDEC seating plane gauge GS-3.  
Rev. 0 12/93  
5. D, D1, and E1 dimensions do not include mold flash or protru-  
sions. Mold flash or protrusions shall not exceed 0.010 inch  
(0.25mm).  
e
6. E and  
pendicular to datum  
7. e and e are measured at the lead tips with the leads uncon-  
are measured with the leads constrained to be per-  
A
-C-  
.
B
C
strained. e must be zero or greater.  
C
8. B1 maximum dimensions do not include dambar protrusions.  
Dambar protrusions shall not exceed 0.010 inch (0.25mm).  
9. N is the maximum number of terminal positions.  
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,  
E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch  
(0.76 - 1.14mm).  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN2853.6  
April 29, 2010  
10  
1...78910

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