Datasheet > HY62256ALP-I

HY62256ALP-I

更新时间： 2024-11-22 22:33:47

品牌	Logo	应用领域
海力士 - HYNIX		静态存储器
页数	文件大小	规格书
14页	822K
描述
32Kx8bit CMOS SRAM

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数据手册

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HY62256ALP-I 数据手册

Data Sheet-sram/62256ald1

http://www.hea.com/hean2/sram/62256ald1.htm

HY62256A-(I) Series

32Kx8bit CMOS SRAM

Description

Features

The

Fully static operation and

Tri-state outputs

HY62256A/HY62256A-I

is a high-speed, low

power and 32,786 x 8-bits

CMOS Static Random

Access Memory

TTL compatible inputs

and outputs

Low power consumption

-2.0V(min.) data

retention

fabricated using

Hyundai's high

Standard pin

configuration

-28 pin 600 mil PDIP

-28 pin 330 mil SOP

-28 pin 8x13.4 mm

TSOP-1

performance CMOS

process technology. The

HY62256A/HY62256A-I

has a data retention mode

that guarantees data to

remain valid at the

(standard and reversed)

minimum power supply

voltage of 2.0 volt. Using

the CMOS technology,

supply voltages from 2.0

to 5.5 volt has little effect

on supply current in the

data retention mode. The

HY62256A/HY62256A-I

is suitable for use in low

voltage operation and

battery back-up

application.

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22/10/97 12:30

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与HY62256ALP-I相关器件

型号	品牌	获取价格	描述	数据表
HY62256ALR1	HYNIX	获取价格	32Kx8bit CMOS SRAM
HY62256ALR1-10	ETC	获取价格	x8 SRAM
HY62256ALR1-55	ETC	获取价格	x8 SRAM
HY62256ALR1-55I	HYNIX	获取价格	Standard SRAM, 32KX8, 55ns, CMOS, PDSO28, 8 X 13.40 MM, REVERSE, TSOP1-28
HY62256ALR1-70	ETC	获取价格	x8 SRAM
HY62256ALR1-70I	HYNIX	获取价格	Standard SRAM, 32KX8, 70ns, CMOS, PDSO28, 8 X 13.40 MM, REVERSE, TSOP1-28
HY62256ALR1-85	ETC	获取价格	x8 SRAM
HY62256ALR1-85I	HYNIX	获取价格	Standard SRAM, 32KX8, 85ns, CMOS, PDSO28, 8 X 13.40 MM, REVERSE, TSOP1-28
HY62256ALR2-10I	HYNIX	获取价格	Standard SRAM, 32KX8, 100ns, CMOS, PDSO28, 8 X 13.40 MM, REVERSE, TSOP1-28
HY62256ALR2-I	HYNIX	获取价格	32Kx8bit CMOS SRAM