HY29F400A Series
4 Megabit 5.0 volt-only Sector Erase Flash Memory
KEY FEATURES
•
•
•
•
•
Ready//Busy
•
•
•
5.0 V± 10% Read, Program, and Erase
Minimizes system-level power requirements
High performance
45 ns access time
Compatible with JEDEC-Standard Commands
-
RY//BY output pin for detection of programming
or erase cycle completion
-
/RESET
Hardware pin resets the internal state machine
to the read mode
Internal Erase Algorithms
-
-
-
Uses software commands, pinouts, and
packages following industry standards for
single power supply Flash memory
-
Automatically erases a sector, any combination
of sectors, or the entire chip
•
•
Minimum 100,000 Program/Erase Cycles
Sector Erase Architecture
Internal Programming Algorithms
-
Automatically programs and verifies data at a
specified address.
-
One 16 Kbytes, two 8 Kbytes, one 32 Kbytes,
and seven 64 Kbytes (byte mode)
Low Power Consumption
-
Any combination of sectors can be erased
concurrently; also supports full chip erase
-
-
-
20 mA typical active read current for Byte Mode
28 mA typical active read current for Word Mode
30 mA typical program/erase current
•
Erase Suspend/Resume
-
Suspend a sector erase operation to allow a
data read in a sector not being erased within
the same device
•
•
Sector Protection
-
Hardware method disables any combination
of sectors from a program or erase operation
Boot Code Sector Architecture
DESCRIPTION
operations.
The HY29F400A is an 4 Megabit, 5.0 volt-only CMOS
Flash memory device organized as a 512 Kbytes of 8-
bits each, or 256 Kbytes of 16 bits each. The device
is offered in standard 44-pin PSOP and 48-pin
TSOP packages. It is designed to be programmed
and erased in-system with a 5.0 volt power-supply
and can also be programmed in standard PROM
programmers.
The HY29F400A is programmed by executing the
program command sequence. This will start the
internal byte/word programming algorithm that
automatically times the program pulse widths
and also verifies proper cell margin. Erase is ac-
complished by executing either the sector erase
or chip erase command sequence. This will start
the internal erasing algorithm that automatically
times the erase pulse width and also verifies
proper cell margin. No preprogramming is re-
quired prior to execution of the internal erase al-
gorithm. Sectors of the HY29F400A Flash
memory array are electrically erased via Fowler-
Nordheim tunneling. Bytes/words are pro-
grammed one byte/word at a time using a hot
electron injection mechanism.
With access times of 45ns, 55ns, 70ns, 90 ns, 120
ns and 150 ns, the HY29F400A has separate chip
enable (/CE), write eable (/WE), and output enable (/
OE) controls. Hyundai Flash memory devices re-
liably store memory data even after 100,000 pro-
gram/erase cycles.
The HY29F400A is entirely pin and command set
compatible with the JEDEC standard for 4Mega-
bit Flash memory devices. Commands are writ-
ten to the command register using standard mi-
croprocessor write timings. Register contents
serve as input to an internal state-machine that
controls the erase and programming circuitry.
Write cycles also internally latch addresses and
data needed for the programming and erase
The HY29F400A features a sector erase architec-
ture. The device memory array is divided into one
16 Kbytes, two 8 Kbytes, one 32 Kbytes, and
seven 64 Kbytes. Sectors can be erased indi-
vidually or in groups without affecting the data in
other sectors. Multiple sector erase and full chip
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits
described. No patent licences are implied.
Rev.03/Aug.97
Hyundai Semiconductor
5秒后页面跳转
英伟达新AI芯片Rubin或提前半年亮相
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
三星深化印度制造布局，供应链本地化进程加速
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
