HY29F040 Series
512K x 8-bit CMOS, 5.0 Volt-only, Sector Erase Flash Memory
KEY FEATURES
•
•
Sector Protection
•
•
•
5.0 V ± 10% Read, Program, and Erase
- Minimizes system-level power requirements
High performance
- 90 ns access time
Low Power Consumption
- 20 mA typical active read current
- 30 mA typical program/erase current
Compatible with the JEDEC Standard for
Single-Voltage Flash Memories
- Uses software commands, pinouts, and
packages following the industry standards
for single power supply Flash memories
- Superior inadvertent write protection
Flexible Sector Architecture
- Any sector may be locked to prevent any
program or erase operation within that sector
Erase Suspend/Resume
- Suspends a sector erase operation to allow
data to be read from, or programmed into,
any sector not being erased
- The erase operation can then be resumed
Internal Erase Algorithm
- Automatically erases a sector, any combination
of sectors, or the entire chip
•
•
•
Internal Programming Algorithm
- Automatically programs and verifies data at a
specified address
•
- Eight equal size sectors of 64K bytes each
- Any combination of sectors can be erased
concurrently
•
•
Minimum 100,000 Program/Erase Cycles
PLCC, PDIP and TSOP Packages
- Supports full chip erase
DESCRIPTION
latch addresses and data needed for the pro-
gramming and erase operations.
The HY29F040 is a 4 Megabit, 5.0 volt-only, CMOS
Flash memory device organized as 524,288
(512 K) bytes of 8 bits each. The Flash memory
array is organized into eight uniform-sized sec-
tors of 64 Kbytes each. The device is offered
with access times of 90, 120 and 150 ns and is
provided in standard 32-pin PDIP, PLCC and
TSOP packages. It is designed to be pro-
grammed and erased in-system with a 5.0 volt
power-supply and can also be reprogrammed
in standard PROM programmers.
The HY29F040 is programmed by invoking the
program command sequence. This starts the
internal byte programming algorithm that auto-
matically times the program pulse width and
verifies the proper cell margin. An erase opera-
tion is performed likewise, by invoking the sec-
tor erase or chip erase command sequence.
This starts the internal erasing algorithm that
automatically preprograms the sector (if it is not
already programmed), times the erase pulse
width and verifies the proper cell margin. Sec-
tors of the HY29F040 Flash memory array are
electrically erased via Fowler-Nordheim tunnel-
ing. Bytes are programmed one byte at a time
using a hot electron injection mechanism.
The HY29F040 has separate chip enable (/CE),
write enable (/WE) and output enable (/OE) con-
trols. Hyundai Flash memory devices reliably
store memory data even after 100,000 program/
erase cycles.
The device is entirely pin and command set
compatible with the JEDEC standard for 4 Mega-
bit Flash memory devices. Commands are writ-
ten to an internal command register using stan-
dard microprocessor write timings. Register
contents serve as inputs to an internal state-
machine which controls the erase and pro-
gramming circuitry. Write cycles also internally
The HY29F040 features a flexible sector erase
architecture. The device memory array is divided
into eight sectors of 64K bytes each. The sec-
tors can be erased individually or in groups with-
out affecting the data in other sectors. The mul-
tiple sector erase and full chip erase capabili-
ties provide flexibility in altering the data in the
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of
circuits described. No patent licences are implied.
Rev.04: April 1998
Hyundai Semiconductor