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HN58S65ASERIES PDF预览

HN58S65ASERIES

更新时间: 2024-11-22 23:56:27
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其他 - ETC /
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18页 94K
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HN58S65ASERIES 数据手册

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HN58S65A Series  
64 k EEPROM (8-kword × 8-bit)  
Ready/Busy function  
ADE-203-691A (Z)  
Preliminary  
Rev. 0.3  
Nov. 1997  
Description  
The Hitachi HN58S65A series is electrically erasable and programmable ROM organized as 8192-word  
× 8-bit. It has realized high speed, low power consumption and high reliability by employing advanced  
MNOS memory technology and CMOS process and circuitry technology. They also have a 64-byte  
page programming function to make their write operations faster.  
Features  
Single supply: 2.2 to 3.6 V  
Access time: 150 ns (max)  
Power dissipation  
Active: 10 mW/MHz (typ)  
Standby: 36 µW (max)  
On-chip latches: address, data, CE, OE, WE  
Automatic byte write: 15 ms (max)  
Automatic page write (64 bytes): 15 ms (max)  
Ready/Busy  
Data polling and Toggle bit  
Data protection circuit on power on/off  
Conforms to JEDEC byte-wide standard  
Reliable CMOS with MNOS cell technology  
105 erase/write cycles (in page mode)  
10 years data retention  
Software data protection  
Industrial versions (Temperature range: – 40 to + 85˚C) are also available.  
Preliminary: This document contains information on a new product. Specifications and information  
contained herein are subject to change without notice.  

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