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HM628512BLTT-7 PDF预览

HM628512BLTT-7

更新时间: 2024-11-20 21:14:51
品牌 Logo 应用领域
瑞萨 - RENESAS 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
18页 85K
描述
IC,SRAM,512KX8,CMOS,TSOP,32PIN,PLASTIC

HM628512BLTT-7 技术参数

生命周期:Obsolete包装说明:TSOPII-32
Reach Compliance Code:compliant风险等级:5.69
Is Samacsys:N最长访问时间:70 ns
其他特性:LG-MAXI/O 类型:COMMON
JESD-30 代码:R-PDSO-G32长度:21.35 mm
内存密度:4194304 bit内存集成电路类型:STANDARD SRAM
内存宽度:8功能数量:1
端子数量:32字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:-20 °C
组织:512KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP2
封装等效代码:TSOP32,.46封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
电源:5 V认证状态:Not Qualified
座面最大高度:1.2 mm最大待机电流:0.00002 A
最小待机电流:2 V子类别:SRAMs
最大压摆率:0.06 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:10.16 mmBase Number Matches:1

HM628512BLTT-7 数据手册

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HM628512B Series  
4 M SRAM (512-kword × 8-bit)  
ADE-203-903D (Z)  
Rev. 3.0  
Aug. 24, 1999  
Description  
The Hitachi HM628512B is a 4-Mbit static RAM organized 512-kword × 8-bit. It realizes higher density,  
higher performance and low power consumption by employing 0.35 µm Hi-CMOS process technology. The  
device, packaged in a 525-mil SOP (foot print pitch width) or 400-mil TSOP TYPE II or 600-mil plastic DIP,  
is available for high density mounting. The HM628512B is suitable for battery backup system.  
Features  
Single 5 V supply  
Access time: 55/70 ns (max)  
Power dissipation  
Active: 50 mW/MHz (typ)  
Standby: 10 µW (typ)  
Completely static memory. No clock or timing strobe required  
Equal access and cycle times  
Common data input and output: Three state output  
Directly TTL compatible: All inputs and outputs  
Battery backup operation  

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