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HM365797M-5:D PDF预览

HM365797M-5:D

更新时间: 2024-11-09 10:02:27
品牌 Logo 应用领域
TEMIC 静态存储器光电二极管
页数 文件大小 规格书
7页 102K
描述
Standard SRAM, 256KX1, 45ns, CMOS, PDIP24,

HM365797M-5:D 数据手册

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HM 65797  
256 K x 1 High Speed CMOS SRAM  
Introduction  
The HM 65797 is a high speed CMOS static RAM Easy memory expansion is provided by an active low chip  
organized as 262, 144 × 1 bit. It is manufactured using select (CS) and three state drivers.  
MHS high performance CMOS technology.  
All inputs and outputs of the HM 65797 are TTL  
Access times as fast 20ns are available with maximum compatible and operate from single 5 V supply thus  
power consumption of only 770 mW.  
simplifying system design.  
The HM 65797 features fully static operation requiring no The HM 65797 is 100 % processed following the test  
external clocks or timing strobes. The automatic methods of MIL STD 883 and/or ESA/SCC 9000 making  
power-down feature reduces the power consumption by it ideally suitable for military/space applications that  
67 % when the circuit is deselected.  
demand superior levels of performance and reliability.  
Features  
D Fast access time  
D Wide temperature range :  
Commercial/industrial : 20/25/35/45/55 ns (max)  
Military : 25/35/45/55 ns (max)  
D Low power consumption  
Active : 770 mW  
–55°C to + 125°C  
D 300 mils width package  
D TTL compatible inputs and outputs asynchronous  
D Capable of withstanding greater than 2000V electrostatic  
discharge single 5 volt supply  
Standby : 220 mW  
Interface  
Block Diagram  
MATRA MHS  
1
Rev. D (16 April.97)  
Preliminary Information  

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