HI-8588-10
ARINC 429 LINE RECEIVER
July 2006
DESCRIPTION
PIN CONFIGURATION
The HI-8588-10 ARINC 429 bus interface receiver is simi-
lar to the HI-8588 with the exception that it allows an exter-
nal 10 Kohm resistor in series with each ARINC input with-
out affecting the ARINC input thresholds. The product is
especially useful in applications where lightning protection
circuitry is also required. In addition, the test inputs force
both of the outputs to zero instead of open circuit. The ana-
log/digital CMOS product requires only a 5 volt supply and
is available in a 8-pin SOIC package.
VCC - 1
TESTA - 2
RINB - 3
RINA - 4
8 - TESTB
7 - ROUTB
6 - ROUTA
5 - GND
HI-8588PSI-10, HI-8588PST-10 & HI-8588PSM-10
8 - PIN PLASTIC NARROW BODY SOIC
Each side of the ARINC bus must be connected through a
10 Kohm series resistor in order for the chip to detect the
correct ARINC levels. The typical 10 volt differential signal
is translated and input to a window comparator and latch.
The comparator levels are set so that with the external
10 Kohm resistors they are just below the standard 6.5 volt
minimum ARINC data threshold and just above the stan-
dard 2.5 volt maximumARINC null threshold.
SUPPLY VOLTAGES
vcc = 5.0V 5%
FUNCTION TABLE
The TESTAand TESTB inputs bypass the analog inputs for
testing purposes. Also if TESTAand TESTB are both taken
high, the digital outputs are forced to zero.
RECEIVER
RINA
RINB
TESTA TESTB ROUTA ROUTB
See Holt Application Note AN-300 for more information on
lightning protection.
-1.25V to 1.25V
-1.25V to 1.25V
0
0
0
0
1
1
0
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
-3.25V to -6.5V
3.25V to 6.5V
FEATURES
3.25V to 6.5V
-3.25V to -6.5V
X
X
X
X
X
X
!
ARINC 429 line receiver interface in a
small outline package
!
Lightning protection simplified with the
ability to add 10 Kohm external series
resistors
PIN DESCRIPTION TABLE
!
!
Receiver input hystersis at least 2 volts
PIN
1
SYMBOL
VCC
FUNCTION
SUPPLY
DESCRIPTION
5 VOLT SUPPLY
CMOS
Test inputs bypass analog inputs and
force digital outputs to an one, zero or
null state
2
TESTA
RINB
LOGIC INPUT
ARINC INPUT
ARINC INPUT
POWER
3
RECEIVER B INPUT
RECEIVER A INPUT
GROUND
4
RINA
5
GND
6
ROUTA
ROUTB
TESTB
LOGIC OUTPUT
LOGIC OUTPUT
LOGIC INPUT
RECEIVER CMOS OUTPUT A
RECEIVER CMOS OUTPUT B
CMOS
!
!
Plastic and ceramic package options -
surface mount and DIP
7
8
Mil processing available
HOLT INTEGRATED CIRCUITS
www.holtic.com
(DS8588-10, Rev. C)
07/06