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HI-8588CRM-10 PDF预览

HI-8588CRM-10

更新时间: 2024-11-13 22:28:47
品牌 Logo 应用领域
HOLTIC /
页数 文件大小 规格书
6页 128K
描述
ARINC 429 LINE RECEIVER

HI-8588CRM-10 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:DIP
包装说明:CERDIP-8针数:8
Reach Compliance Code:compliantECCN代码:7A994
HTS代码:8542.39.00.01风险等级:5.23
输入特性:DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型:LINE RECEIVER
接口标准:ARINC 429JESD-30 代码:R-GDIP-T8
JESD-609代码:e0长度:9.652 mm
功能数量:1端子数量:8
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP8,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
最大接收延迟:接收器位数:1
座面最大高度:5.08 mm子类别:Line Driver or Receivers
最大压摆率:6.3 mA最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

HI-8588CRM-10 数据手册

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HI-8588-10  
ARINC 429 LINE RECEIVER  
January 2001  
DESCRIPTION  
PIN CONFIGURATION  
The HI-8588-10 ARINC 429 bus interface receiver is simi-  
lar to the HI-8588 with the exception that it allows an exter-  
nal 10 Kohm resistor in series with each ARINC input with-  
out affecting the ARINC input thresholds. The product is  
especially useful in applications where lightning protection  
circuitry is also required. In addition, the test inputs force  
both of the outputs to zero instead open circuit. The ana-  
log/digital CMOS product requires only a 5 volt supply and  
isavailable in a SO 8 pin package.  
VCC 1  
TESTA 2  
RINB 3  
8 TESTB  
7 ROUTB  
6 ROUTA  
RINA 4  
5
GND  
Each side of the ARINC bus must be connected through a  
10 Kohm series resistor in order for the chip to detect the  
correct ARINC levels. The typical 10 volt differential signal  
is translated and input to a window comparator and latch.  
The comparator levels are set so that with the external  
10 Kohm resistors they are just below the standard 6.5 volt  
minimum ARINC data threshold and just above the stan-  
dard 2.5 voltmaximum ARINC nullthreshold.  
SUPPLY VOLTAGES  
vcc = 5.0V ± 5%  
FUNCTION TABLE  
The TESTA and TESTB inputs bypass the analog inputs  
for testing purposes. Also if TESTA and TESTB are both  
taken high, the digitaloutputsare forced to zero.  
FEATURES  
PIN DESCRIPTION TABLE  
PIN  
SYMBOL  
VCC  
FUNCTION  
SUPPLY  
DESCRIPTION  
5 VOLT SUPPLY  
TESTA  
RINB  
LOGIC INPUT  
ARINC INPUT  
ARINC INPUT  
POWER  
CMOS  
RECEIVER B INPUT  
RECEIVER A INPUT  
GROUND  
RINA  
GND  
ROUTA  
ROUTB  
TESTB  
LOGIC OUTPUT  
LOGIC OUTPUT  
LOGIC INPUT  
RECEIVER CMOS OUTPUT A  
RECEIVER CMOS OUTPUT B  
CMOS  
HOLT INTEGRATED CIRCUITS  
1
(DS8588-10 Rev. A)  
01/01  

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