DATASHEET
HFA3101
Gilbert Cell UHF Transistor Array
FN3663
Rev 5.00
September 2004
The HFA3101 is an all NPN transistor array configured as a
Multiplier Cell. Based on Intersil’s bonded wafer UHF-1 SOI
Features
• Pb-free Available as an Option
process, this array achieves very high f (10GHz) while
T
maintaining excellent h and V matching characteristics
• High Gain Bandwidth Product (f ) . . . . . . . . . . . . . 10GHz
T
FE
BE
that have been maximized through careful attention to circuit
design and layout, making this product ideal for
communication circuits. For use in mixer applications, the
cell provides high gain and good cancellation of 2nd order
distortion terms.
• High Power Gain Bandwidth Product. . . . . . . . . . . . 5GHz
• Current Gain (h ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
FE
• Low Noise Figure (Transistor) . . . . . . . . . . . . . . . . . 3.5dB
• Excellent h and V Matching
FE BE
Ordering Information
• Low Collector Leakage Current . . . . . . . . . . . . . . <0.01nA
• Pin to Pin Compatible to UPA101
PART NUMBER
(BRAND)
TEMP.
RANGE (°C)
PKG.
DWG. #
PACKAGE
8 Ld SOIC
Applications
HFA3101B
(H3101B)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
M8.15
M8.15
M8.15
M8.15
• Balanced Mixers
HFA3101BZ
(H3101B) (Note)
8 Ld SOIC
(Pb-free)
• Multipliers
• Demodulators/Modulators
• Automatic Gain Control Circuits
• Phase Detectors
HFA3101B96
(H3101B)
8 Ld SOIC Tape
and Reel
HFA3101BZ96
8 Ld SOIC Tape
and Reel (Pb-free)
(H3101B) (Note)
• Fiber Optic Signal Processing
• Wireless Communication Systems
• Wide Band Amplification Stages
• Radio and Satellite Communications
• High Performance Instrumentation
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020C.
Pinout
HFA3101
(SOIC)
TOP VIEW
Q
Q
Q
Q
3 4
1
2
Q
Q
6
5
NOTE: Q and Q - 2 Paralleled 3m x 50m Transistors
5
6
Q , Q , Q , Q - Single 3m x 50m Transistors
1
2
3
4
FN3663 Rev 5.00
September 2004
Page 1 of 12