Datasheet > 逻辑 > 预分频器/多谐振动器> HD74LS221P-E

HD74LS221P-E

更新时间： 2024-11-11 13:08:15

品牌	Logo	应用领域
瑞萨 - RENESAS		触发器
页数	文件大小	规格书
9页	104K
描述
LS SERIES, DUAL MONOSTABLE MULTIVIBRATOR, PDIP16, 6.30 X 19.20 MM, 2.54 MM PITCH, PLASTIC, DIP-16

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HD74LS221P-E 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	DIP
包装说明：	DIP,	针数：	16
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.65	系列：	LS
JESD-30 代码：	R-PDIP-T16	长度：	19.2 mm
逻辑集成电路类型：	MONOSTABLE MULTIVIBRATOR	湿度敏感等级：	1
数据/时钟输入次数：	2	功能数量：	2
端子数量：	16	最高工作温度：	75 °C
最低工作温度：	-20 °C	输出极性：	COMPLEMENTARY
封装主体材料：	PLASTIC/EPOXY	封装代码：	DIP
封装形状：	RECTANGULAR	封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	传播延迟（tpd）：	80 ns
认证状态：	Not Qualified	座面最大高度：	5.06 mm
最大供电电压 (Vsup)：	5.25 V	最小供电电压 (Vsup)：	4.75 V
标称供电电压 (Vsup)：	5 V	表面贴装：	NO
技术：	TTL	温度等级：	COMMERCIAL EXTENDED
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7.62 mm	Base Number Matches：	1

HD74LS221P-E 数据手册

HD74LS221

Dual Monostable Multivibrators

REJ03D0458–0300

Rev.3.00

Jul.15.2005

This multivibrator features a negative-transition-triggered input and a positive-transition-triggered input either of which

can be used as an inhibit input. Pulse triggering occurs at a particular voltage level and is not directly related to the

transition time of the input pulse. Schmitt-trigger input circuitry (TTL hysteresis) for B input allows jitter-free

triggering from inputs with transition rates as slow as 1 V/s, providing the circuit with excellent noise immunity of

typically 1.2 V. A high immunity to V_CCnoise of typically 1.5 V is also provided by internal latching circuitry. Once

fired, the outputs are independent of further transitions of the A and B inputs and are a function of the timing

components, or the output pulses can be terminated by the overriding clear. Input pulses may be of any duration

relative to the output pulse. Output rise and fall times are TTL compatible and independent of pulse length.

Typical triggering and clearing sequence are illustrated as a part of the switching characteristics waveforms. Pulse

width stability is achieved through internal compensation and is virtually independent of V_CCand temperature.

In most applications, pulse stability will only be limited by the accuracy of external timing components. Jitter-free

operation is maintained over the full temperature and V_CCrange for more than six decades of timing capacitance (10 pF

to 10 µF) and more than one decade of timing resistance (2 kΩ to 100 kΩ).

Throughout these ranges, pulse width is defined by the relationship: t_{w (out)}= Cext • Rext • 1n 2.

Features

•

Ordering Information

Package Code

(Previous Code)

Package

Abbreviation

Taping Abbreviation

(Quantity)

Part Name

Package Type

DILP-16 pin

PRDP0016AE-B

(DP-16FV)

HD74LS221P

HD74LS221RPEL

—

PRSP0016DG-A

(FP-16DNV)

SOP-16 pin (JEDEC)

EL (2,500 pcs/reel)

Note: Please consult the sales office for the above package availability.

Rev.3.00, Jul.15.2005, page 1 of 8

12 3 4 5 6 7...9

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与HD74LS221P-E相关器件

型号	品牌	获取价格	描述	数据表
HD74LS221RP	HITACHI	获取价格	暂无描述
HD74LS221RPEL	RENESAS	获取价格	Dual Monostable Multivibrators
HD74LS221RP-EL	RENESAS	获取价格	LS SERIES, DUAL MONOSTABLE MULTIVIBRATOR, PDSO16, FP-16DN
HD74LS221RP-EL	HITACHI	获取价格	暂无描述
HD74LS22FP	HITACHI	获取价格	NAND Gate, LS Series, 2-Func, 4-Input, TTL, PDSO14, FP-14DA, 14 PIN
HD74LS22FP-EL	HITACHI	获取价格	NAND Gate, LS Series, 2-Func, 4-Input, TTL, PDSO14, FP-14DA
HD74LS22P	HITACHI	获取价格	LS SERIES, DUAL 4-INPUT NAND GATE, PDIP14, DP-14
HD74LS22RP	HITACHI	获取价格	NAND Gate, LS Series, 2-Func, 4-Input, TTL, PDSO14, FP-14DN, 14 PIN
HD74LS22RP-EL	HITACHI	获取价格	NAND Gate, LS Series, 2-Func, 4-Input, TTL, PDSO14, FP-14DN
HD74LS240	HITACHI	获取价格	Octal Buffers/Line Drivers/Line Receivers(inverted three-state outputs)

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