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HD74LS221RP-EL PDF预览

HD74LS221RP-EL

更新时间： 2024-09-23 13:08:15
品牌 Logo 应用领域
瑞萨 - RENESAS 触发器
页数 文件大小 规格书
9页 104K
描述
LS SERIES, DUAL MONOSTABLE MULTIVIBRATOR, PDSO16, FP-16DN

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中文翻译

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HD74LS221RP-EL 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP,针数：16
Reach Compliance Code：compliant风险等级：5.18
Is Samacsys：N系列：LS
JESD-30 代码：R-PDSO-G16长度：9.9 mm
逻辑集成电路类型：MONOSTABLE MULTIVIBRATOR数据/时钟输入次数：2
功能数量：2端子数量：16
最高工作温度：75 °C最低工作温度：-20 °C
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：NOT SPECIFIED
传播延迟（tpd）：80 ns认证状态：Not Qualified
座面最大高度：1.75 mm最大供电电压 (Vsup)：5.25 V
最小供电电压 (Vsup)：4.75 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：TTL
温度等级：COMMERCIAL EXTENDED端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：3.9 mm
Base Number Matches：1

HD74LS221RP-EL 数据手册

 浏览型号HD74LS221RP-EL的Datasheet PDF文件第2页浏览型号HD74LS221RP-EL的Datasheet PDF文件第3页浏览型号HD74LS221RP-EL的Datasheet PDF文件第4页浏览型号HD74LS221RP-EL的Datasheet PDF文件第5页浏览型号HD74LS221RP-EL的Datasheet PDF文件第6页浏览型号HD74LS221RP-EL的Datasheet PDF文件第7页 
HD74LS221  
Dual Monostable Multivibrators  
REJ03D0458–0300  
Rev.3.00  
Jul.15.2005  
This multivibrator features a negative-transition-triggered input and a positive-transition-triggered input either of which  
can be used as an inhibit input. Pulse triggering occurs at a particular voltage level and is not directly related to the  
transition time of the input pulse. Schmitt-trigger input circuitry (TTL hysteresis) for B input allows jitter-free  
triggering from inputs with transition rates as slow as 1 V/s, providing the circuit with excellent noise immunity of  
typically 1.2 V. A high immunity to VCC noise of typically 1.5 V is also provided by internal latching circuitry. Once  
fired, the outputs are independent of further transitions of the A and B inputs and are a function of the timing  
components, or the output pulses can be terminated by the overriding clear. Input pulses may be of any duration  
relative to the output pulse. Output rise and fall times are TTL compatible and independent of pulse length.  
Typical triggering and clearing sequence are illustrated as a part of the switching characteristics waveforms. Pulse  
width stability is achieved through internal compensation and is virtually independent of VCC and temperature.  
In most applications, pulse stability will only be limited by the accuracy of external timing components. Jitter-free  
operation is maintained over the full temperature and VCC range for more than six decades of timing capacitance (10 pF  
to 10 µF) and more than one decade of timing resistance (2 kΩ to 100 kΩ).  
Throughout these ranges, pulse width is defined by the relationship: tw (out) = Cext • Rext • 1n 2.  
Features  
•
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
DILP-16 pin  
PRDP0016AE-B  
(DP-16FV)  
HD74LS221P  
HD74LS221RPEL  
P
—
PRSP0016DG-A  
(FP-16DNV)  
SOP-16 pin (JEDEC)  
RP  
EL (2,500 pcs/reel)  
Note: Please consult the sales office for the above package availability.  
Rev.3.00, Jul.15.2005, page 1 of 8  
1234567...9

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