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HD74LS241FPEL PDF预览

HD74LS241FPEL

更新时间: 2024-11-11 05:35:15
品牌 Logo 应用领域
瑞萨 - RENESAS 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
5页 153K
描述
Octal Buffers / Line Drivers / Line Receivers (non inverted three-state outputs)

HD74LS241FPEL 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.3
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.42
控制类型:ENABLE LOW/HIGH系列:LS
JESD-30 代码:R-PDSO-G20长度:12.6 mm
负载电容(CL):45 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A位数:4
功能数量:2端口数量:2
端子数量:20最高工作温度:75 °C
最低工作温度:-20 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL电源:5 V
最大电源电流(ICC):54 mAProp。Delay @ Nom-Sup:18 ns
传播延迟(tpd):18 ns认证状态:Not Qualified
座面最大高度:2.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL EXTENDED
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:5.5 mm
Base Number Matches:1

HD74LS241FPEL 数据手册

 浏览型号HD74LS241FPEL的Datasheet PDF文件第2页浏览型号HD74LS241FPEL的Datasheet PDF文件第3页浏览型号HD74LS241FPEL的Datasheet PDF文件第4页浏览型号HD74LS241FPEL的Datasheet PDF文件第5页 
HD74LS241  
Octal Buffers / Line Drivers / Line Receivers  
(non inverted three-state outputs)  
REJ03D0460–0200  
Rev.2.00  
Feb.18.2005  
Features  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
DILP-20 pin  
PRDP0020AC-B  
(DP-20NEV)  
HD74LS241P  
HD74LS241FPEL  
P
PRSP0020DD-B  
(FP-20DAV)  
SOP-20 pin (JEITA)  
FP  
EL (2,000 pcs/reel)  
Note: Please consult the sales office for the above package availability.  
Pin Arrangement  
1
2
18  
17  
16  
15  
14  
13  
12  
11  
1G  
C  
2G  
1A  
1
4
2
3
2Y  
1A  
2
1Y  
2A  
1Y  
2A  
1Y  
2A  
1Y  
2A  
1
4
2
3
3
2
4
1
10  
(Top view)  
Function Table  
Inputs  
Output  
1G  
H
L
2G  
L
A
X
H
L
Y
Z
H
L
H
L
H
Note: H; high level, L; low level, X; irrelevant, Z; off (high-impedance) state of a 3-state output  
Rev.2.00, Feb.18.2005, page 1 of 4  

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