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HD74HCT640RP PDF预览

HD74HCT640RP

更新时间: 2024-11-24 06:03:15
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
8页 70K
描述
HCT SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, PDSO20

HD74HCT640RP 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Contact Manufacturer包装说明:SOP,
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.34系列:HCT
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:12.8 mm逻辑集成电路类型:BUS TRANSCEIVER
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):23 ns
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
Base Number Matches:1

HD74HCT640RP 数据手册

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HD74HCT640/HD74HCT643  
Octal Bus Transceivers (with 3-state outputs)  
ADE-205-562 (Z)  
1st. Edition  
Sep. 2000  
Description  
Both the HD74HCT640 and the HD74HCT643 have one active low enable input (G), and a direction  
control (DIR). When the DIR input is high, data flows from the A inputs to the B outputs. When DIR is  
low, data flows from B to A.  
The HD74HCT640 transfers inverted data from one bus to the other. The HD74HCT643 transfers inverted  
data from the A bus to the B bus and non-inverted data from the B bus to the A bus.  
Features  
LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility  
High Speed Operation: tpd (A to B) = 14.5 ns typ (CL = 50 pF)  
High Output Current: Fanout of 15 LSTTL Loads  
Wide Operating Voltage: VCC = 4.5 to 5.5 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)  
Function Table  
Control Input  
Operation  
G
L
DIR  
L
HD74HCT640  
B data to A bus  
A data to B bus  
Isolation  
HD74HCT643  
B data to A bus  
A data to B bus  
Isolation  
L
H
H
X

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