Datasheet > HD74HCT643P

HD74HCT643P

更新时间： 2024-11-22 23:55:27

品牌	Logo	应用领域
其他 - ETC		总线收发器
页数	文件大小	规格书
7页	52K
描述
BUS TRANSCEIVER\|SINGLE\|8-BIT\|HCT-CMOS\|DIP\|20PIN\|PLASTIC

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HD74HCT643P 数据手册

HD74HCT640/HD74HCT643

Octal Bus Transceivers (with 3-state outputs)

Description

Both the HD74HCT640 and the HD74HCT643 have one active low enable input (G), and a direction

control (DIR). When the DIR input is high, data flows from the A inputs to the B outputs. When DIR is

low, data flows from B to A.

The HD74HCT640 transfers inverted data from one bus to the other. The HD74HCT643 transfers inverted

data from the A bus to the B bus and non-inverted data from the B bus to the A bus.

Features

•

LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility

High Speed Operation: t_pd(A to B) = 14.5 ns typ (C_L= 50 pF)

High Output Current: Fanout of 15 LSTTL Loads

Wide Operating Voltage: V_CC= 4.5 to 5.5 V

Low Input Current: 1 µA max

Low Quiescent Supply Current: I_CC(static) = 4 µA max (Ta = 25°C)

Function Table

Control Input

Operation

DIR

HD74HCT640

B data to A bus

A data to B bus

Isolation

HD74HCT643

B data to A bus

A data to B bus

Isolation

12 3 4 5 6 7

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