HD74HCT74AFP-EL

更新时间： 2024-11-23 13:01:51

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HD74HCT74AFP-EL 数据手册

HD74HCT74A

Dual D–type Positive Edge–triggered Flip Flops

with Clear and Preset

ADE-205-290 (Z)

1st. Edition

June 1999

Description

The HD74HCT74A has independent data, preset, clear, and clock inputs Q and Q outputs in a 14 pin

package. The logic level present at the data input is transferred to the output during the positive going

transition of the clock pulse. Preset and clear are independent of the clock and accomplished by a low level

at the appropriate input.

Features

•

V_CC= 4.5 to 5.5 V operation

Input terminal has protection diode

Function Table

Inputs

Outputs

PRE

CLR

CLK

H ^*1

↑

Q₀

H : High level

L : Low level

X : Immaterial

↑ : Low to high transition

Q₀: Level to Q before the indicated steady state input conditions were established.

Note : 1. Q and Q will remain high as long as preset and clear are low, but Q and Q are unpredictable, if

preset and clear go high simultaneously.

12 3 4 5 6 7...10

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型号	品牌	获取价格	描述	数据表
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