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HD74HC77 PDF预览

HD74HC77

更新时间: 2024-09-28 05:35:15
品牌 Logo 应用领域
瑞萨 - RENESAS 锁存器
页数 文件大小 规格书
7页 96K
描述
4-bit Bistable Latch

HD74HC77 数据手册

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HD74HC77  
4-bit Bistable Latch  
REJ03D0552-0200  
(Previous ADE-205-424)  
Rev.2.00  
Oct 06, 2005  
Description  
The HD74HC77 is ideally suited for use as temporary storage for binary information between processing units and  
input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable  
(G) is high and the Q output will follow the data input as long as the enable remains high. When the enable goes low  
the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the  
enable is permitted to go high.  
Features  
High Speed Operation: tpd (D to Q) = 12 ns typ (CL = 50 pF)  
High Output Current: Fanout of 10 LSTTL Loads  
Wide Operating Voltage: VCC = 2 to 6 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C)  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
DILP-14 pin  
PRDP0014AB-B  
(DP-14AV)  
HD74HC77P  
P
PRSP0014DF-B  
(FP-14DAV)  
HD74HC77FPEL  
HD74HC77RPEL  
SOP-14 pin (JEITA)  
SOP-14 pin (JEDEC)  
FP  
RP  
EL (2,000 pcs/reel)  
EL (2,500 pcs/reel)  
PRSP0014DE-A  
(FP-14DNV)  
Note: Please consult the sales office for the above package availability.  
Function Table  
Inputs  
Output  
Data  
L
Enable G  
Q
H
H
L
L
H
H
X
No change  
H :  
L :  
X :  
High level  
Low level  
Irrelevant  
Rev.2.00, Oct 06, 2005 page 1 of 6  

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