HD74HC77FP-EL

更新时间： 2024-09-28 13:08:19

品牌	Logo	应用领域
日立 - HITACHI		锁存器
页数	文件大小	规格书
9页	50K
描述
D Latch, HC/UH Series, 2-Func, High Level Triggered, 2-Bit, True Output, CMOS, PDSO14, FP-14DA

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HD74HC77FP-EL 数据手册

HD74HC77

4-bit Bistable Latch

Description

The HD74HC77 is ideally suited for use as temporary storage for binary information between processing

units and input/output or indicator units. Information present at a data (D) input is transferred to the Q

output when the enable (G) is high and the Q output will follow the data input as long as the enable remains

high. When the enable goes low the information (that was present at the data input at the time the transition

occurred) is retained at the Q output until the enable is permitted to go high.

Features

•

High Speed Operation: t_pd(D to Q) = 12 ns typ (C_L= 50 pF)

High Output Current: Fanout of 10 LSTTL Loads

Wide Operating Voltage: V_CC= 2 to 6 V

Low Input Current: 1 µA max

Low Quiescent Supply Current: I_CC(static) = 2 µA max (Ta = 25°C)

Function Table

Inputs

Output

No change

12 3 4 5 6 7...9

中文翻译

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型号	品牌	获取价格	描述	数据表
HD74HC77P	RENESAS	获取价格	4-bit Bistable Latch
HD74HC77RP	ETC	获取价格	LATCH\|SINGLE\|4-BIT\|HC-CMOS\|SOP\|14PIN\|PLASTIC
HD74HC77RPEL	RENESAS	获取价格	4-bit Bistable Latch
HD74HC77RP-EL	RENESAS	获取价格	HC/UH SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDSO14, FP-14DN
HD74HC77T	HITACHI	获取价格	D Latch, HC/UH Series, 2-Func, High Level Triggered, 2-Bit, True Output, CMOS, PDSO14, TTP
HD74HC77T-EL	HITACHI	获取价格	D Latch, HC/UH Series, 2-Func, High Level Triggered, 2-Bit, True Output, CMOS, PDSO14, TTP
HD74HC78	HITACHI	获取价格	Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock)
HD74HC78	RENESAS	获取价格	Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock)
HD74HC78FP	HITACHI	获取价格	J-K Flip-Flop, HC/UH Series, 1-Func, Negative Edge Triggered, 2-Bit, Complementary Output,
HD74HC78FPEL	RENESAS	获取价格	Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock)