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HD74ALVCH162374 PDF预览

HD74ALVCH162374

更新时间: 2024-11-08 22:55:03
品牌 Logo 应用领域
日立 - HITACHI 触发器
页数 文件大小 规格书
12页 57K
描述
16-bit Edge triggered D-type Flip Flops with 3-state Outputs

HD74ALVCH162374 数据手册

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HD74ALVCH162374  
16-bit Edge triggered D-type Flip Flops with 3-state Outputs  
ADE-205-180B (Z)  
Preliminary  
3rd. Edition  
October 1997  
Description  
The HD74ALVCH162374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional  
bus drivers, and working registers. It can be used as two 8-bit flip flops or one 16-bit flip flop. On the  
positive transition of the clock (CLK) input, the Q outputs of the flip flop take on the logic levels set up at  
the data (D) inputs.  
The output enable (OE) input can be used to place the eight outputs in either a normal logic state (high or  
low logic levels) or a high impedance state. In the high impedance state, the outputs neither load nor drive  
the bus lines significantly. The high impedance state and the increased drive provide the capability to drive  
bus lines without need for interface or pullup components. OE does not affect internal operations of the  
flip flops. Old data can be retained or new data can be entered while the outputs are in the high impedance  
state.  
Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level. All  
outputs, which are designed to sink up to 12 mA, include 26 resistors to reduce overshoot and  
undershoot.  
Features  
VCC = 2.3 V to 3.6 V  
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)  
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)  
High output current ±12 mA (@VCC = 3.0 V)  
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors  
All outputs have equivalent 26 series resistors, so no external resistors are required.  

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