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HD-15530

更新时间： 2024-09-18 22:33:19
品牌 Logo 应用领域
英特矽尔 - INTERSIL 解码器编码器
页数 文件大小 规格书
12页 172K
描述
CMOS Manchester Encoder-Decoder

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HD-15530 数据手册

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HD-15530  
CMOS Manchester Encoder-Decoder  
March 1997  
Features  
Description  
• Support of MlL-STD-1553  
The Intersil HD-15530 is a high performance CMOS device  
intended to service the requirements of MlL-STD-1553 and  
similar Manchester II encoded, time division multiplexed  
serial data protocols. This LSI chip is divided into two  
sections, an Encoder and a Decoder. These sections  
operate completely independent of each other, except for the  
Master Reset functions.  
• Data Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.25 MBit/s  
• Sync Identification and Lock-In  
• Clock Recovery  
• Manchester II Encode, Decode  
This circuit meets many of the requirements of MIL-STD-  
1553. The Encoder produces the sync pulse and the parity  
bit as well as the encoding of the data bits. The Decoder  
recognizes the sync pulse and identifies it as well as decod-  
ing the data bits and checking parity.  
• Separate Encode and Decode  
• Low Operating Power . . . . . . . . . . . . . . . . . 50mW at 5V  
Ordering Information  
PACKAGE  
TEMP. RANGE  
1.25 MEGABIT/s PKG. NO.  
This integrated circuit is fully guaranteed to support the  
1MHz data rate of MlL-STD-1553 over both temperature and  
voltage. It interfaces with CMOS, TTL or N channel support  
circuitry, and uses a standard 5V supply.  
o
o
CERDIP  
-40 C to +85 C HD1-15530-9  
F24.6  
J28.A  
E24.6  
o
o
-55 C to +125 C HD1-15530-8  
SMD#  
CLCC  
7802901JA  
o
o
The HD-15530 can also be used in many party line digital  
data communications applications, such as an environmen-  
tal control system driven from a single twisted pair cable of  
fiber optic cable throughout the building.  
-40 C to +85 C HD4-15530-9  
o
o
-55 C to +125 C HD4-15530-8  
SMD#  
PDIP  
78029013A  
o
o
-40 C to +85 C HD3-15530-9  
Pinouts  
HD-15530 (CERDIP, PDIP)  
HD-15530 (CLCC)  
TOP VIEW  
TOP VIEW  
VALID WORD  
ENCODER  
SHIFT CLK  
1
2
24  
V
CC  
23 ENCODER CLK  
22  
TAKE DATA  
SERIAL DATA OUT  
DECODER CLK  
3
SEND CLK IN  
21 SEND DATA  
4
4
3
2
1
28 27 26  
SEND  
DATA  
DECODER  
CLK  
25  
5
6
5
20 SYNC SELECT  
19 ENCODER ENABLE  
18 SERIAL DATA IN  
17 BIPOLAR ONE OUT  
16 OUTPUT INHIBIT  
BIPOLAR ZERO IN  
BIPOLAR ONE IN  
6
24 NC  
23 NC  
NC  
NC  
7
7
UNIPOLAR DATA IN  
8
SYNC  
BIPOLAR  
ZERO IN  
22  
21  
20  
19  
8
DECODER SHIFT CLK  
9
SELECT  
COMMAND/  
DATA SYNC  
BIPOLAR  
ZERO OUT  
ENCODER  
ENABLE  
BIPOLAR  
ONE IN  
10  
15  
9
DECODER RESET 11  
14 ÷ 6 OUT  
UNIPOLAR  
DATA IN  
SERIAL  
DATA IN  
10  
11  
GND 12  
13 MASTER RESET  
DECODER  
SHIFT CLK  
BIPOLAR  
ONE OUT  
12 13 14 15 16 17 18  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 2960.1  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 19959-142  
1234567...12

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