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HCTS160K/SAMPLE PDF预览

HCTS160K/SAMPLE

更新时间： 2024-11-02 14:50:47
品牌 Logo 应用领域
瑞萨 - RENESAS 输出元件逻辑集成电路触发器
页数 文件大小 规格书
9页 139K
描述
HCT SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, CDFP16

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中文翻译

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HCTS160K/SAMPLE 技术参数

生命周期：Obsolete零件包装代码：DFP
包装说明：DFP,针数：16
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.61计数方向：UP
系列：HCTJESD-30 代码：R-CDFP-F16
负载/预设输入：YES逻辑集成电路类型：DECADE COUNTER
工作模式：SYNCHRONOUS位数：4
功能数量：1端子数量：16
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：DFP
封装形状：RECTANGULAR封装形式：FLATPACK
传播延迟（tpd）：26 ns认证状态：Not Qualified
座面最大高度：2.92 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
端子形式：FLAT端子节距：1.27 mm
端子位置：DUAL触发器类型：POSITIVE EDGE
宽度：6.73 mmBase Number Matches：1

HCTS160K/SAMPLE 数据手册

 浏览型号HCTS160K/SAMPLE的Datasheet PDF文件第2页浏览型号HCTS160K/SAMPLE的Datasheet PDF文件第3页浏览型号HCTS160K/SAMPLE的Datasheet PDF文件第4页浏览型号HCTS160K/SAMPLE的Datasheet PDF文件第5页浏览型号HCTS160K/SAMPLE的Datasheet PDF文件第6页浏览型号HCTS160K/SAMPLE的Datasheet PDF文件第7页 
HCTS160MS  
Radiation Hardened  
Synchronous Counter  
September 1995  
Features  
Pinouts  
16 LEAD CERAMIC DUAL-IN-LINE  
METAL SEAL PACKAGE (SBDIP)  
MIL-STD-1835 CDIP2-T16  
TOP VIEW  
• 3 Micron Radiation Hardened SOS CMOS  
• Total Dose 200K RAD (Si)  
• SEP Effective LET No Upsets: >100 MEV-cm2/mg  
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day  
(Typ)  
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s  
• Dose Rate Upset: >1010 RAD (Si)/s 20ns Pulse  
• Latch-Up Free Under Any Conditions  
• Fanout (Over Temperature Range)  
-Standard Outputs 10 LSTTL Loads  
• Military Temperature Range: -55oC to +125oC  
• Significant Power Reduction Compared to LSTTL ICs  
• DC Operating Voltage Range: 4.5V to 5.5V  
• LSTTL Input Compatibility  
MR  
CP  
P0  
1
2
3
4
5
6
7
8
16 VCC  
15 TC  
14 Q0  
13 Q1  
12 Q2  
11 Q3  
10 TE  
P1  
P2  
P3  
PE  
9
SPE  
GND  
-VIL = 0.8V Max  
-VIH = VCC/2 Min  
• Input Current Levels Ii ≤ 5µA @ VOL, VOH  
16 LEAD CERAMIC METAL SEAL  
FLATPACK PACKAGE (FLATPACK)  
MIL-STD-1835 CDFP4-F16  
TOP VIEW  
Description  
The Intersil HCTS160MS is a Radiation Hardened high speed  
presettable BCD decade synchronous counter that features an  
asynchronous reset and look-ahead carry logic. Counting and  
parallel presetting are accomplished synchronously with the low-  
to-high transition of the clock. A low level on the synchronous  
parallel enable input, SPE, disables counting and allows data at  
the preset inputs, P0 - P3, to be loaded into the counter. The  
counter is reset by a low on the master reset input, MR. Two count  
enables, PE and TE are provided for n-bit cascading. TE also  
controls the terminal count output, TC. The terminal count output  
indicates a maximum count for one clock pulse and is used to  
enable the next cascaded stage to count.  
MR  
CP  
P0  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VCC  
TC  
Q0  
P1  
Q1  
P2  
Q2  
P3  
Q3  
PE  
TE  
GND  
SPE  
The HCTS160MS utilizes advanced CMOS/SOS technology to  
achieve high-speed operation. This device is a member of  
radiation hardened, high-speed, CMOS/SOS Logic Family.  
The HCTS160MS is supplied in a 16 lead Ceramic flatpack  
(K suffix) or a SBDIP Package (D suffix).  
Ordering Information  
PART NUMBER  
HCTS160DMSR  
TEMPERATURE RANGE  
SCREENING LEVEL  
Intersil Class S Equivalent  
Intersil Class S Equivalent  
Sample  
PACKAGE  
o
o
-55 C to +125 C  
16 Lead SBDIP  
o
o
HCTS160KMSR  
-55 C to +125 C  
16 Lead Ceramic Flatpack  
16 Lead SBDIP  
o
HCTS160D/Sample  
HCTS160K/Sample  
HCTS160HMSR  
+25 C  
o
+25 C  
Sample  
16 Lead Ceramic Flatpack  
Die  
o
+25 C  
Die  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Spec Number 518611  
File Number 2484.2  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
560  
1234567...9

中文翻译

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