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HCTS161AHMSR

更新时间： 2024-11-01 22:05:31
品牌 Logo 应用领域
英特矽尔 - INTERSIL 计数器
页数 文件大小 规格书
9页 118K
描述
Radiation Hardened Synchronous Counter

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HCTS161AHMSR 数据手册

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HCTS161AMS  
Radiation Hardened  
Synchronous Counter  
September 1995  
Features  
Pinouts  
• 3 Micron Radiation Hardened CMOS SOS  
16 LEAD CERAMIC DUAL-IN-LINE  
METAL SEAL PACKAGE (SBDIP)  
MIL-STD-1835 CDIP2-T16, LEAD FINISH C  
TOP VIEW  
• Total Dose 200K RAD (Si)  
• Minimum LET for SEU Upsets: >100 MEV-cm2/mg  
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-  
Day (Typ)  
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s  
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse  
• Latch-Up Free Under Any Conditions  
• Military Temperature Range: -55oC to +125oC  
• Significant Power Reduction Compared to LSTTL ICs  
• DC Operating Voltage Range: 4.5V to 5.5V  
VCC  
TC  
MR  
CP  
P0  
16  
15  
14  
13  
1
2
3
4
5
6
7
8
Q0  
P1  
Q1  
P2  
12 Q2  
Q3  
P3  
11  
10 TE  
SPE  
PE  
GND  
9
• Input Logic Levels  
-VIL = 0.8V Max  
-VIH = VCC/2V Min  
• Input Current Levels Ii ≤ 5µA at VOL, VOH  
16 LEAD CERAMIC METAL SEAL  
FLATPACK PACKAGE (FLATPACK)  
MIL-STD-1835 CDFP4-F16, LEAD FINISH C  
TOP VIEW  
Description  
The Intersil HCTS161AMS high-reliability high-speed presettable  
four-bit binary synchronous counter features asynchronous reset  
and look-ahead carry logic. The HCTS161AMS has an active-low  
master reset to zero, MR. A low level at the synchronous parallel  
enable, SPE, disables counting and allows data at the preset  
inputs (P0 - P3) to load the counter. The data is latched to the  
outputs on the positive edge of the clock input, CP. The  
HCTS161AMS has two count enable pins, PE and TE. TE also  
controls the terminal count output, TC. The terminal count output  
indicates a maximum count for one clock pulse and is used to  
enable the next cascaded stage to count.  
VCC  
TC  
MR  
CP  
P0  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Q0  
Q1  
P1  
Q2  
P2  
Q3  
P3  
TE  
PE  
SPE  
GND  
The HCTS161AMS utilizes advanced CMOS/SOS technology to  
achieve high-speed operation. This device is a member of  
radiation hardened, high-speed, CMOS/SOS Logic Family.  
The HCTS161AMS is supplied in a 16 lead Ceramic flatpack  
(K suffix) or a SBDIP Package (D suffix).  
Ordering Information  
PART NUMBER  
HCTS161ADMSR  
TEMPERATURE RANGE  
SCREENING LEVEL  
Intersil Class S Equivalent  
Intersil Class S Equivalent  
Sample  
PACKAGE  
o
o
-55 C to +125 C  
16 Lead SBDIP  
o
o
HCTS161AKMSR  
HCTS161AD/Sample  
HCTS161AK/Sample  
HCTS161AHMSR  
-55 C to +125 C  
16 Lead Ceramic Flatpack  
16 Lead SBDIP  
o
+25 C  
o
+25 C  
Sample  
16 Lead Ceramic Flatpack  
Die  
o
+25 C  
Die  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Spec Number 518888  
File Number 2144.2  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
1
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