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HCPL2611V PDF预览

HCPL2611V

更新时间: 2024-11-05 11:10:43
品牌 Logo 应用领域
安森美 - ONSEMI 输出元件光电栅极
页数 文件大小 规格书
14页 404K
描述
8引脚DIP 10 Mbit/s单通道高速逻辑栅极输出光耦合器

HCPL2611V 技术参数

是否无铅: 不含铅生命周期:Active
Reach Compliance Code:compliantFactory Lead Time:1 week
风险等级:2.02其他特性:UL RECOGNIZED, VDE APPROVED
配置:SINGLE标称数据速率:10 MBps
最大正向电流:0.05 A最大绝缘电压:2500 V
安装特点:THROUGH HOLE MOUNT元件数量:1
功能数量:1最大通态电流:0.05 A
最高工作温度:85 °C最低工作温度:-40 °C
光电设备类型:LOGIC IC OUTPUT OPTOCOUPLER最小供电电压:4.5 V
表面贴装:NOBase Number Matches:1

HCPL2611V 数据手册

 浏览型号HCPL2611V的Datasheet PDF文件第2页浏览型号HCPL2611V的Datasheet PDF文件第3页浏览型号HCPL2611V的Datasheet PDF文件第4页浏览型号HCPL2611V的Datasheet PDF文件第5页浏览型号HCPL2611V的Datasheet PDF文件第6页浏览型号HCPL2611V的Datasheet PDF文件第7页 
DATA SHEET  
www.onsemi.com  
High-Speed 10 MBit/s  
Logic Gate Optocouplers  
PDIP8 6.6x3.81, 2.54P  
CASE 646BW  
8
1
Single-Channel: 6N137,  
HCPL2601, HCPL2611  
Dual-Channel: HCPL2630,  
HCPL2631  
PDIP8 9.655x6.6, 2.54P  
CASE 646CQ  
8
8
1
1
Description  
The 6N137, HCPL2601, HCPL2611 singlechannel and  
HCPL2630, HCPL2631 dualchannel optocouplers consist of a  
850 nm AlGaAS LED, optically coupled to a very high speed  
integrated photodetector logic gate with a strobable output. This  
output features an open collector, thereby permitting wired OR  
outputs. The coupled parameters are guaranteed over the temperature  
range of 40°C to +85°C. A maximum input signal of 5 mA will  
provide a minimum output sink current of 13 mA (fan out of 8).  
An internal noise shield provides superior common mode rejection  
of typically 10 kV/s. The HCPL2601 and HCPL2631 has a minimum  
CMR of 5 kV/s. The HCPL2611 has a minimum CMR of 10 kV/s.  
PDIP8 GW  
CASE 709AC  
MARKING DIAGRAM  
ON  
2601  
VXXYYT1  
2601  
V
= Device Number  
Features  
= VDE mark (Note: Only Appears on  
Parts Ordered with VDE Option – See  
Order Entry Table)  
= TwoDigit Year Code, e.g., ‘03’  
= TwoDigit Work Week, Ranging from  
‘01’ to ‘53’  
Very High Speed – 10 MBit/s  
Superior CMR – 10 kV/s  
Double working voltage 480 V  
Fanout of 8 Over 40°C to +85°C  
Logic Gate Output  
Strobable Output  
Wired ORopen Collector  
U.L. Recognized (File # E90700)  
XX  
YY  
T1  
= Assembly Package Code  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 10 of  
this data sheet.  
Applications  
Ground Loop Elimination  
LSTTL to TTL, LSTTL or 5volt CMOS  
Line Receiver, Data Transmission  
Data Multiplexing  
Switching Power Supplies  
Pulse Transformer Replacement  
Computerperipheral Interface  
© Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
August, 2021 Rev. 3  
HCPL2631/D  

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