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HCC40110BF PDF预览

HCC40110BF

更新时间: 2024-11-03 22:56:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 解码器驱动器锁存器逻辑集成电路
页数 文件大小 规格书
11页 221K
描述
DECADE UP-DOWN COUNTER/DECODER/LATCH/DRIVER

HCC40110BF 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.78
其他特性:JOHNSON COUNTER; TCO UP AND TCO DOWN OUTPUTS; SEPARATE UP/DOWN CLOCK; 7 SEGMENT DISPLAY DRIVER计数方向:BIDIRECTIONAL
系列:4000/14000/40000JESD-30 代码:R-GDIP-T16
JESD-609代码:e0负载电容(CL):50 pF
负载/预设输入:YES逻辑集成电路类型:DISPLAY DRIVER COUNTER
工作模式:SYNCHRONOUS位数:5
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:3/18 V
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Counters最大供电电压 (Vsup):18 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
宽度:7.62 mmBase Number Matches:1

HCC40110BF 数据手册

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HCC40110B  
HCF40110B  
DECADE UP-DOWN COUNTER/DECODER/LATCH/DRIVER  
.
.
.
.
.
SEPARATE CLOCK-UP AND CLOCK-DOWN  
LINES  
CAPABLE OF DRIVING COMMON CATHODE  
LEDS AND OTHER DISPLAYS DIRECTLY  
ALLOWS CASCADING WITHOUT ANY EX-  
TERNAL CIRCUITRY  
MAXIMUM INPUT CURRENT OF 1 µA AT 18 V  
(full package-temperature range)  
QUIESCENT CURRENT AT 20 V FOR HCC DE-  
VICE  
5 V, 10 V AND 15 V PARAMETRIC RATINGS  
INPUT CURRENT OF 100 nA AT 18 V AND  
25 °C FOR HCC DEVICE  
100 % TESTED FOR QUIESCENT CURRENT  
MEETS ALLREQUIREMENTS OF JEDECTEN-  
TATIVE STANDARD No. 13 A, ”STANDARD  
SPECIFICATIONS FOR DESCRIPTION OF ”B”  
SERIES CMOS DEVICES”  
EY  
F
(Plastic Package)  
(Ceramic Package)  
.
.
.
.
C1  
(Chip Carrier)  
ORDER CODES :  
HCC40110BF HCF40110BEY  
HCF40110BC1  
DESCRIPTION  
The HCC 40110B (extended temperature range)  
and HCF 40110B (intermediate temperature range)  
are monolithic integrated circuits, available in 16-  
lead dual in-line plastic or ceramic package. The  
HCC/HCF 40110B is a dual-clocked up/down  
counter with a special preconditioning circuit that  
allows the counter to be clocked, via positive going  
inputs, up or down regardless of that state or timing  
(within 100 ns typ.) of the other clock line. The clock  
signal is fed into the control logic and Johnson  
counter after is preconditioned. The outputs of the  
Johnson counter (which include antilock gating to  
avoid being locked at an illegal state) are fed into a  
latch. This data can be fed directly to the decoder  
through the latch or can be strobed to hold a particu-  
lar count while the Johnson counter continues to be  
clocked. The decoder feeds a seven-segment bipo-  
lar output driver which can source up to 25 mA to  
drive LEDs and other displays such as low-voltage  
fluorescent and incandescent lamps. A short dura-  
tion negative-going pulse appears on theBORROW  
output when the count changes from 0 to 9 or the  
CARRY output when the count changes from 9 to  
0. At the other times the BORROW and CARRY out-  
put are a logic 1. The CARRY and BORROW out-  
puts can be tied directly to the clock-up and  
clock-down lines respectively of another HCC/HCF  
40110B for easy cascading of several counters.  
PIN CONNECTIONS  
September 1988  
1/11  

HCC40110BF 替代型号

型号 品牌 替代类型 描述 数据表
CD40110BE TI

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