Datasheet > HB56UW873E-6A

HB56UW873E-6A

更新时间： 2024-09-14 23:54:47

品牌	Logo	应用领域
其他 - ETC		内存集成电路动态存储器
页数	文件大小	规格书
27页	388K
描述
x72 EDO Page Mode DRAM Module

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HB56UW873E-6A 数据手册

HB56UW873E-A Series

64MB Buffered EDO DRAM DIMM

8-Mword × 72-bit, 4k Refresh, 1 Bank Module

(9 pcs of 8M × 8 components)

ADE-203-821B (Z)

Rev. 2.0

Nov. 20, 1997

Description

The HB56UW873E-A belongs to 8 Byte DIMM (Dual In-line Memory Module) family, and has been

developed as an optimized main memory solution for 4 and 8 Byte processor applications. The

HB56UW873E-A is a 8M × 72 dynamic RAM module, mounted 9 pieces of 64-Mbit DRAM

(HM5165805A) sealed in TSOP package and 2 pieces of 16-bit BiCMOS line driver sealed in TSSOP

package. The HB56UW873E-A offers Extended Data Out (EDO) Page Mode as a high speed access mode.

An outline of the HB56UW873E-A is 168-pin socket type package (dual lead out). Therefore, the

HB56UW873E-A makes high density mounting possible without surface mount technology. The

HB56UW873E-A provides common data inputs and outputs. Decoupling capacitors are mounted beside

each TSOP on the its module board.

Features

•

168-pin socket type package (Dual lead out)

Lead pitch: 1.27 mm

Single 3.3 V supply: 3.3 V +0.3 V/–0.15 V (HB56UW873E-5AR)

3.3 V ± 0.3 V (HB56UW873E-6A/7A)

High speed

Access time: t_RAC= 50 ns /60 ns /70 ns (max)

Access time: t_CAC= 18 ns /20 ns /23 ns (max)

Low power dissipation

•

Active mode: 6.32 mW/5.38 W/4.73 W (max)

Standby mode (TTL): 100 mW (max)

Buffered input except RAS and DQ

4 byte interleave enabled, dual address input (A0/B0)

EDO page mode capability

•

4,096 refresh cycle: 64 ms

2 variations of refresh

RAS-only refresh

CAS-before-RAS refresh

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