Datasheet > GVT71128E36T-10

GVT71128E36T-10

更新时间： 2024-10-28 23:54:15

品牌	Logo	应用领域
其他 - ETC		静态存储器
页数	文件大小	规格书
14页	132K
描述
x36 Fast Synchronous SRAM

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GVT71128E36T-10 数据手册

GVT71128E36

128K X 36 SYNCHRONOUS BURST SRAM

GALVANTECH, INC.

SYNCHRONOUS

BURST SRAM

FLOW-THROUGH

128K x 36 SRAM

+3.3V CORE SUPPLY, +2.5V I/O SUPPLY

REGISTERED INPUTS, BURST COUNTER

FEATURES

GENERAL DESCRIPTION

•

Fast access times: 7.5, 8, 8.5, and 10ns

Fast clock speed: 117, 100, 90, and 50 MHz

Provide high performance 2-1-1-1 access rate

Fast OE# access times: 4.0ns

3.3V -5% and +10% core power supply

2.5V or 3.3V I/O supply

The Galvantech Synchronous Burst SRAM family

employs high-speed, low power CMOS designs using

advanced triple-layer polysilicon, double-layer metal

technology. Each memory cell consists of four transistors and

two high valued resistors.

The GVT71128E36 SRAM integrates 131,072x36

SRAM cells with advanced synchronous peripheral circuitry

and a 2-bit counter for internal burst operation. All

synchronous inputs are gated by registers controlled by a

positive-edge-triggered clock input (CLK). The synchronous

inputs include all addresses, all data inputs, address-pipelining

chip enable (CE#), depth-expansion chip enables (CE2# and

CE2), burst control inputs (ADSC#, ADSP#, and ADV#),

write enables (BW1#, BW2#, BW3#, BW4#,and BWE#), and

global write (GW#).

Asynchronous inputs include the output enable (OE#),

burst mode control (MODE), and sleep mode control (ZZ).

The data outputs (Q), enabled by OE#, are also asynchronous.

Addresses and chip enables are registered with either

address status processor (ADSP#) or address status controller

(ADSC#) input pins. Subsequent burst addresses can be

internally generated as controlled by the burst advance pin

(ADV#).

5V tolerant inputs except I/O’s

Clamp diodes to VSSQ at all inputs and outputs

Common data inputs and data outputs

BYTE WRITE ENABLE and GLOBAL WRITE control

Three chip enables for depth expansion and address

pipeline

•

Address, data and control registers

Internally self-timed WRITE CYCLE

Burst control pins (interleaved or linear burst sequence)

Automatic power-down for portable applications

Low profile 119 lead, 14mm x 22mm BGA (Ball Grid

Array) and 100 pin TQFP packages

OPTIONS

•

MARKING

Timing

7.5ns access/8.5ns cycle

8ns access/10ns cycle

8.5ns access/11ns cycle

10ns access/20ns cycle

-7

-8

-9

-10

Address, data inputs, and write controls are registered on-

chip to initiate self-timed WRITE cycle. WRITE cycles can

be one to four bytes wide as controlled by the write control

inputs. Individual byte write allows individual byte to be

written. BW1# controls DQ1-DQ8 and DQP1. BW2# controls

DQ9-DQ16 and DQP2. BW3# controls DQ17-DQ24 and

DQP3. BW4# controls DQ25-DQ32 and DQP4. BW1#,

BW2# BW3#, and BW4# can be active only with BWE#

being LOW. GW# being LOW causes all bytes to be written.

The GVT71128E36 operates from a +3.3V core power

supply and all outputs operate on a +2.5V supply. All inputs

and outputs are JEDEC standard JESD8-5 compatible. The

•

Packages

119-lead BGA

100-pin TQFP

device is ideally suited for 486, Pentium , 680x0, and

PowerPC systems and for systems that are benefited from a

wide synchronous data bus.

Pentium is a trademark of Intel Corporation.

Galvantech, Inc. 3080 Oakmead Village Drive, Santa Clara, CA 95051

Tel (408) 566-0688 Fax (408) 566-0699

Rev. 5/98

PowerPC is a trademark of IBM Corporation.

Galvantech, Inc. reserves the right to change

products or specifications without notice.

12 3 4 5 6 7...14

中文翻译

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与GVT71128E36T-10相关器件

型号	品牌	获取价格	描述	数据表
GVT71128E36T-7	CYPRESS	获取价格	Standard SRAM, 128KX36, 7.5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-10
GVT71128E36T-8	CYPRESS	获取价格	Standard SRAM, 128KX36, 8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
GVT71128E36T-9	CYPRESS	获取价格	Standard SRAM, 128KX36, 8.5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-10
GVT71128F36T-3	CYPRESS	获取价格	Cache SRAM, 128KX36, 3.5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
GVT71128F36T-4	CYPRESS	获取价格	Cache SRAM, 128KX36, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
GVT71128F36T-6	CYPRESS	获取价格	Cache SRAM, 128KX36, 4ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
GVT71128G36B-3	CYPRESS	获取价格	Standard SRAM, 128KX36, 3.5ns, CMOS, PBGA119, 14 X 22 MM, 2.40 MM HEIGHT, PLASTIC, BGA-119
GVT71128G36B-5	CYPRESS	获取价格	Standard SRAM, 128KX36, 4ns, CMOS, PBGA119, 14 X 22 MM, 2.40 MM HEIGHT, PLASTIC, BGA-119
GVT71128G36B-6	CYPRESS	获取价格	Standard SRAM, 128KX36, 4ns, CMOS, PBGA119, 14 X 22 MM, 2.40 MM HEIGHT, PLASTIC, BGA-119
GVT71128G36T-3	CYPRESS	获取价格	Standard SRAM, 128KX36, 3.5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-10

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