Datasheet > 存储 > SRAM> GS8162Z18BB-250

GS8162Z18BB-250

更新时间： 2024-11-05 03:54:03

品牌	Logo	应用领域
GSI		静态存储器
页数	文件大小	规格书
34页	1555K
描述
18Mb Pipelined and Flow Through Synchronous NBT SRAM

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GS8162Z18BB-250 数据手册

GS8162Z18/36B(B/D)

250 MHz–150 MHz

119- & 165-Bump BGA

Commercial Temp

Industrial Temp

18Mb Pipelined and Flow Through

Synchronous NBT SRAM

2.5 V or 3.3 V V

2.5 V or 3.3 V I/O

Features

Because it is a synchronous device, address, data inputs, and

read/write control inputs are captured on the rising edge of the

input clock. Burst order control (LBO) must be tied to a power

rail for proper operation. Asynchronous inputs include the

Sleep mode enable (ZZ) and Output Enable. Output Enable can

be used to override the synchronous control of the output

drivers and turn the RAM's output drivers off at any time.

Write cycles are internally self-timed and initiated by the rising

edge of the clock input. This feature eliminates complex off-

chip write pulse generation required by asynchronous SRAMs

and simplifies input signal timing.

• NBT (No Bus Turn Around) functionality allows zero wait

Read-Write-Read bus utilization; fully pin-compatible with

both pipelined and flow through NtRAM™, NoBL™ and

ZBT™ SRAMs

• 2.5 V or 3.3 V +10%/–10% core power supply

• 2.5 V or 3.3 V I/O supply

• User-configurable Pipeline and Flow Through mode

• ZQ mode pin for user-selectable high/low output drive

• IEEE 1149.1 JTAG-compatible Boundary Scan

• On-chip write parity checking; even or odd selectable

• On-chip parity encoding and error detection

• LBO pin for Linear or Interleave Burst mode

• Pin-compatible with 2M, 4M, and 8M devices

• Byte write operation (9-bit Bytes)

The GS8162Z18/36B(B/D) may be configured by the user to

operate in Pipeline or Flow Through mode. Operating as a

pipelined synchronous device, in addition to the rising-edge-

triggered registers that capture input signals, the device

incorporates a rising edge triggered output register. For read

cycles, pipelined SRAM output data is temporarily stored by

the edge-triggered output register during the access cycle and

then released to the output drivers at the next rising edge of

clock.

• 3 chip enable signals for easy depth expansion

• ZZ Pin for automatic power-down

• JEDEC-standard 119-bump and 165-bump BGA packages

• RoHS-compliant 119-bump and 165-bump BGA packages

available

Functional Description

The GS8162Z18/36B(B/D) is implemented with GSI's high

performance CMOS technology and is available in a JEDEC-

standard 119-bump or 165-bump BGA package.

The GS8162Z18/36B(B/D) is an 18Mbit Synchronous Static

SRAM. GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or

other pipelined read/double late write or flow through read/

single late write SRAMs, allow utilization of all available bus

bandwidth by eliminating the need to insert deselect cycles

when the device is switched from read to write cycles.

Parameter Synopsis

-250

-200

-150

Unit

t_KQ

2.5

4.0

3.0

5.0

3.8

6.7

tCycle

Pipeline

3-1-1-1

295

345

245

285

200

225

Curr (x18)

Curr (x36)

t_KQ

5.5

6.5

7.5

tCycle

Flow Through

2-1-1-1

225

255

200

220

185

205

Curr (x18)

Curr (x36)

Rev: 1.04a 2/2006

1/34

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

12 3 4 5 6 7...34

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与GS8162Z18BB-250相关器件

型号	品牌	获取价格	描述	数据表
GS8162Z18BB-250I	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18BB-250IT	GSI	获取价格	ZBT SRAM, 1MX18, 5.5ns, CMOS, PBGA119, FPBGA-119
GS8162Z18BB-250IV	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18BB-250IVT	GSI	获取价格	ZBT SRAM, 1MX18, 5.5ns, CMOS, PBGA119, FPBGA-119
GS8162Z18BB-250T	GSI	获取价格	ZBT SRAM, 1MX18, 5.5ns, CMOS, PBGA119, FPBGA-119
GS8162Z18BB-250V	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18BB-300	GSI	获取价格	ZBT SRAM, 1MX18, 5.3ns, CMOS, PBGA119, FBGA-119
GS8162Z18BB-300I	GSI	获取价格	ZBT SRAM, 1MX18, 5.3ns, CMOS, PBGA119, FBGA-119
GS8162Z18BB-300T	GSI	获取价格	ZBT SRAM, 1MX18, 5.3ns, CMOS, PBGA119, FBGA-119
GS8162Z18BB-V	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM

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