Datasheet > 存储 > SRAM> GS8162Z18BB-250V

GS8162Z18BB-250V

更新时间： 2024-11-05 03:54:03

品牌	Logo	应用领域
GSI		静态存储器
页数	文件大小	规格书
33页	1561K
描述
18Mb Pipelined and Flow Through Synchronous NBT SRAM

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

GS8162Z18BB-250V 数据手册

Preliminary

GS8162ZxxB(B/D)-xxxV

250 MHz–150 MHz

119- & 165-Bump BGA

Commercial Temp

Industrial Temp

18Mb Pipelined and Flow Through

Synchronous NBT SRAM

1.8 V or 2.5 V V

1.8 V or 2.5 V I/O

Features

Because it is a synchronous device, address, data inputs, and

read/write control inputs are captured on the rising edge of the

input clock. Burst order control (LBO) must be tied to a power

rail for proper operation. Asynchronous inputs include the

Sleep mode enable (ZZ) and Output Enable. Output Enable can

be used to override the synchronous control of the output

drivers and turn the RAM's output drivers off at any time.

Write cycles are internally self-timed and initiated by the rising

edge of the clock input. This feature eliminates complex off-

chip write pulse generation required by asynchronous SRAMs

and simplifies input signal timing.

• NBT (No Bus Turn Around) functionality allows zero wait

Read-Write-Read bus utilization; fully pin-compatible with

both pipelined and flow through NtRAM™, NoBL™ and

ZBT™ SRAMs

• 1.8 V or 2.5 V core power supply

• 1.8 V or 2.5 V I/O supply

• User-configurable Pipeline and Flow Through mode

• ZQ mode pin for user-selectable high/low output drive

• IEEE 1149.1 JTAG-compatible Boundary Scan

• On-chip write parity checking; even or odd selectable

• On-chip parity encoding and error detection

• LBO pin for Linear or Interleave Burst mode

• Pin-compatible with 2M, 4M, and 8M devices

• Byte write operation (9-bit Bytes)

• 3 chip enable signals for easy depth expansion

• ZZ Pin for automatic power-down

• JEDEC-standard 119- and 165-bump BGA packages

• RoHS-compliant 119- and 165-bump BGA packages

available

The GS8162ZxxB(B/D)-xxxV may be configured by the user

to operate in Pipeline or Flow Through mode. Operating as a

pipelined synchronous device, in addition to the rising-edge-

triggered registers that capture input signals, the device

incorporates a rising edge triggered output register. For read

cycles, pipelined SRAM output data is temporarily stored by

the edge-triggered output register during the access cycle and

then released to the output drivers at the next rising edge of

clock.

Functional Description

The GS8162ZxxB(B/D)-xxxV is implemented with GSI's high

performance CMOS technology and is available in a JEDEC-

standard 119-bump or 165-bump BGA package.

The GS8162ZxxB(B/D)-xxxV is an 18Mbit Synchronous

Static SRAM. GSI's NBT SRAMs, like ZBT, NtRAM, NoBL

or other pipelined read/double late write or flow through read/

single late write SRAMs, allow utilization of all available bus

bandwidth by eliminating the need to insert deselect cycles

when the device is switched from read to write cycles.

Parameter Synopsis

-250

-200

-150

Unit

t_KQ

3.0

4.0

3.0

5.0

3.8

6.7

Pipeline

3-1-1-1

tCycle

Curr (x18)

Curr (x32/x36)

280

330

230

270

185

210

t_KQ

5.5

6.5

7.5

Flow Through

2-1-1-1

tCycle

Curr (x18)

Curr (x32/x36)

210

240

185

205

170

190

Rev: 1.01a 6/2006

1/33

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

12 3 4 5 6 7...33

中文翻译

下载PDF

与GS8162Z18BB-250V相关器件

型号	品牌	获取价格	描述	数据表
GS8162Z18BB-300	GSI	获取价格	ZBT SRAM, 1MX18, 5.3ns, CMOS, PBGA119, FBGA-119
GS8162Z18BB-300I	GSI	获取价格	ZBT SRAM, 1MX18, 5.3ns, CMOS, PBGA119, FBGA-119
GS8162Z18BB-300T	GSI	获取价格	ZBT SRAM, 1MX18, 5.3ns, CMOS, PBGA119, FBGA-119
GS8162Z18BB-V	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18BD-150	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18BD-150I	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18BD-150IT	GSI	获取价格	ZBT SRAM, 1MX18, 7.5ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, FPBGA-165
GS8162Z18BD-150IV	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18BD-150V	GSI	获取价格	18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18BD-150VT	GSI	获取价格	暂无描述

与GS8162Z18BB-250V相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

13
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

9
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

35
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

31

产品中心

服务支持

精选活动

关于我们

帮助中心

GS8162Z18BB-250V

GS8162Z18BB-250V 数据手册

与GS8162Z18BB-250V相关器件

与GS8162Z18BB-250V相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

GS8162Z18BB-250V

GS8162Z18BB-250V 数据手册

与GS8162Z18BB-250V相关器件

与GS8162Z18BB-250V相关文章

您还可以找

您在本页遇到什么问题？